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Design and Analysis of Low Voltage Low-power SRAM

Saeidi, Roghayeh | 2013

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  1. Type of Document: Ph.D. Dissertation
  2. Language: Farsi
  3. Document No: 45769 (05)
  4. University: Sharif University of Technology
  5. Department: Electrical Engineering
  6. Advisor(s): Hajsadeghi , Khosro; Sharifkhani, Mohammad
  7. Abstract:
  8. The explosive growth of battery operated devices has made low-power design a priority in recent years. Moreover, embedded SRAM units have become an important block in modern SoCs. The increasing number of transistor count in the SRAM units and the surging leakage current of the MOS transistors in the scaled technologies have made the SRAM unit a power hungry block from both dynamic and static perspectives. One of the key strategies for reducing power consumption is reducing the supply voltage to near or below the threshold voltage of the transistor. However, as supply voltage decreases to tackle the power consumption, the data stability of the SRAM cells have become a major concern in recent years. In this dissertation, we study the factors affecting the stability of a static memory cell and explicitly calculate the relationship between the read static noise margin (SNM) in terms of the threshold voltage and the physical parameters of the cell transistors. We study the effect of the process, temperature, supply voltage, the word line voltage, and transistor size variations on this relationship and display the results as a probability distribution function. In addition, we analyze the dynamic read noise margin of the cell and use the obtained relations to calculate the failure probability of the memory cells. We also introduce four structures to increase the cell stability and reduce the power consumption. These structures provide 60%-160% improvement in the mean value of the read SNM with little effect on the write noise margin. To evaluate the performance and their structures, they are compared with the conventional structures of the SRAM cell. Finally, using the concept of dynamic stability, we propose a new method of reading data that increases the read stability without any additional transistor.
  9. Keywords:
  10. Static Random Access Memory (SRAM)Cell ; Dynamic Stability ; Process Variation ; Static Nois Margin (SNM) ; Subthreshold

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