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Counter-Measure Against Power Analysis Attacks Using Dual-Rail Logic in Reconfigurable Devices

Kashiri, Jamaladdin | 2015

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 47576 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Bayat Sarmadi, Siavash; Asadi, Hossein
  7. Abstract:
  8. Naïve hardware implementation of encryption modules can cause leakage about the secret information. Attackers can use this information to extract the secret key. This approach is known as side channel attack (SCA). An example of such attacks is differential power analysis (DPA), which uses a number of traces of power consumption of the encryption device. One of the proposed methods to deal with such attack is using dual rail logic. In previous implementations based on a dual rail logic, symmetric complementary mapping with the cross coupling and pre-charging is being used. This method has relatively high delay and cost; however, significant increase in the level of security can be achieved. The purpose of this work, is improving the previous approaches and implementation on reconfigurable devices (FPGA) and reducing the leakage of information based on the power consumption analysis. Therefore, by improving this methods and control placement and routing, we use dual rail logic. The focus of the proposed method is to put main circuit and it’s dual alongside together, to make the dynamic power consumption fixed and not dependent on the input data. Using the proposed method, it is more difficult to extract the secret keys through the power analysis. To implement the proposed method, we have used Xilinx design language (XDL). Our experimental results show more resistance against power analysis attacks due to better flattening of power consumption
  9. Keywords:
  10. Routing ; Location ; Reconfigurable Architecture ; Dual Rail Logic ; Symmetric Complementary Mapping ; Cross Coupling ; Xilinx Design Language (XDL)Tools

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