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Reliability Improvement in 3D Network-on-chips Against Crosstalk Fault

Mirosanlou, Reza | 2015

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 47713 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Miremadi, Ghassem
  7. Abstract:
  8. Technology node scaling in recent decades ushered in gate delay cut-off and rise of interconnection latency. Hence, interconnects have become a major performance bottleneck of high performance system-on-chips (SoC) and integrated circuits (IC). In addition, interconnectiosns have become more susceptible to noises in particular crosstalk. On the other hand, the advent of multi-core processors with ever increasing number of cores has highlighted the need for fast and reliable interconnections. One of the potential solutions to alleviate the interconnection delay problem is the three dimensional integration using through-silicon vias (TSV). Vertical integration of IC dies using TSVs offers high density connections between adjacent dies. This technology also allows stacking of dies with nonidentical technologies such as CMOS with high density DRAM which can be used as a solution to mitigate memory wall problem. Furthermore, the average and maximum distance between interconnect nodes of the 3D stacked ICs are greatly decreased which leads to significant delay, power, and area improvement. Despite of TSV advantages, the adjacent, short and bounded TSVs are prone to TSV-to-TSV coupling and crosstalk noise which increases transmission time and power consumption, and more importantly, it threats the signal integrity. This TSV-to-TSV coupling could be very challenging in 3D ICs due to fact that TSVs are large and thick, thus the coupling between two adjacent TSVs can be huge. Moreover, the effective coupling capacitance between TSVs doubles when the aggressor and the victim signals switch in the opposite directions. Plenty of crosstalk minimization methods have been proposed in the literature of 2D design. However, these methods cannot be directly applied to alleviate TSV-toTSV crosstalk noise, inasmuch as the TSVs are not placed in the same planar and are greatly affected by more than two aggressors. Recent efforts in TSV-to-TSV crosstalk minimization are complex and impose significant area and TSV overhead. ShieldUS, by adding a crossbar, remaps data to TSVs in order to shield more active signals by the signals which predicted to have less transition in the future. In addition to its complex decision making circuit, the accuracy of its predictor is under question due to the fact that the signals may not have a regular pattern. 3DLAT exploits less adjacent codes to limit maximum number of transitions in adjacent TSVs. Crosstalk Avoidance Codes (CAC) is another coding scheme for TSV-to-TSV crosstalk minimization. These approaches also need a complex and large coder and also suffer from a considerable information redundancy overhead. In this thesis, we propose two TSV-to-TSV crosstalk minimization methods (named 3DCAM and CRDR) which can effectively reduce coupling noise between TSVs with a relatively low area and TSV overhead. In addition, the proposed methods use a small simple coder which reduces run-time performance overhead. In the case of a transition on a target signal, considering the target’s neighbors and their coupling effect, 3DCAM and CRDR decide to whether retain target’s value or send its original transition. In the condition that coder decides to retain the value it informs the decoder through a control TSV. The simulation results show that 3DCAM can reduce the transmission delay up to 25.7% as compared to 3DLAT mechanism. 3DCAM imposed only 30% TSV overhead which is much less than the 3DLAT TSV overhead (which is 80% for ω = 4). The results for CRDR are very similar to 3DCAM but there is difference in their application
  9. Keywords:
  10. Three Dimentional Network on Chip (NOC) ; Low Overhead ; Crosstalk Fault ; Signal Integrity ; Nanotechnology ; Deep-submicron Technology

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