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A reliable and power efficient flow-control method to eliminate crosstalk faults in network-on-chips

Patooghy, A ; Sharif University of Technology

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  1. Type of Document: Article
  2. DOI: 10.1016/j.micpro.2011.08.004
  3. Abstract:
  4. This paper proposes a power-efficient flow-control method to tackle the problem of crosstalk faults in Network-on-Chips (NoCs). The method, called FRR (Flit Reordering/Rotation), combines three coding mechanisms to entirely eliminate opposite direction transitions (OD transitions) as the source of crosstalk faults in NoC communication channels. The first mechanism, called flit-reordering, reorders flits of every packet to find a flit sequence which produces the lowest number of OD transitions on NoC channels. The second mechanism called flit-rotation, logically rotates the content of every flit of the packet with respect to previously sent flit to achieve even more reduction in the number of OD transitions. Finally, the third mechanism called flit-insertion, investigates flits of the packet to find the OD transitions which are not removed by first and second mechanisms. This mechanism inserts null-flits between the required flits to completely eliminate appearance of OD transitions on NoC channels. Evaluation of FRR method is done in two ways: (1) VHDL-based simulations are carried out for 16- and 32-bit channels when maximum reorderings and maximum rotations in the first and second mechanisms are limited to 2, 4, and 8. (2) An analytical model is developed to calculate and compare the expected number of OD transitions in an unprotected NoC as well as an FRR-enabled NoC. Both simulation and analytical results confirm that the FRR method completely removes crosstalk faults from NoC channels. In addition, VHDL simulations show that the FRR method provides a remarkable power saving, since the method reduces the number of transitions in NoC channels by at least 32.8%
  5. Keywords:
  6. Crosstalk ; Network-on-chip ; Power consumption ; Reliability ; Analytical model ; Analytical results ; Coding mechanism ; Crosstalk fault ; Network-on-chips ; Power efficient ; Power savings ; VHDL simulation ; Electric power utilization ; Mathematical models ; Rotation ; Routers ; VLSI circuits
  7. Source: Microprocessors and Microsystems ; Volume 35, Issue 8 , 2011 , Pages 766-778 ; 01419331 (ISSN)
  8. URL: http://www.sciencedirect.com/science/article/pii/S0141933111000949