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A scalable dependability scheme for routing fabric of SRAM-based reconfigurable devices

Yazdanshenas, S ; Sharif University of Technology | 2015

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  1. Type of Document: Article
  2. DOI: 10.1109/TVLSI.2014.2344051
  3. Publisher: Institute of Electrical and Electronics Engineers Inc , 2015
  4. Abstract:
  5. With the continual scaling of feature size, system failure due to soft errors is getting more frequent in CMOS technology. Soft errors have particularly severe effects in static random-access memory (SRAM)-based reconfigurable devices (SRDs) since an error in SRD configuration bits can permanently change the functionality of the system. Since interconnect resources are the dominant contributor to the overall configuration memory upsets in SRD-based designs, the system failure rate can be significantly reduced by mitigating soft errors in routing fabric. This paper first presents a comprehensive analysis of SRD switch box susceptibility to short and open faults. Based on this analysis, we present a dependable routing fabric by efficiently employing asymmetric SRAM cells in configuration memory of SRDs. The proposed scheme is highly scalable and capable of achieving any desired level of dependability. In the proposed scheme, we also present a fault masking mechanism to mitigate the effect of soft errors in the routing circuitry. A routing algorithm is also proposed to take the advantage of the proposed routing fabric. Experimental results over the Microelectronics Center of North Carolina benchmarks show that the proposed scheme can mitigate both single and multiple event upsets in the routing fabric and can reduce system failure rate orders of magnitude as compared with the conventional protection techniques
  6. Keywords:
  7. Asymmetric static random-access memory (SRAM) ; Routing fabric ; Soft errors ; SRAM-based reconfigurable devices (SRDs) ; CMOS integrated circuits ; Errors ; Failure analysis ; Fault tolerant computer systems ; Microelectronics ; Radiation hardening ; Random access storage ; Random errors ; Systems engineering ; Comprehensive analysis ; Conventional protections ; Dependability ; Interconnect resources ; Reconfigurable devices ; Soft error ; Static random access memory ; System failure rates ; Static random access storage
  8. Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems ; Volume 23, Issue 9 , August , 2015 , Pages 1868-1878 ; 10638210 (ISSN)
  9. URL: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6879339