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Design of a Multi-Phase Wideband Frequency Synthesizer

Tavana, Fatemeh | 2021

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 54147 (05)
  4. University: Sharif University of Technology
  5. Department: Electrical Engineering
  6. Advisor(s): Sharif Bakhtiar, Mehrdad
  7. Abstract:
  8. In this research, the design of a broadband multi-phase frequency synthesizer, applicable for the multi-path structure in the 5G NR1 transmitter, is investigated. This standard presents new challenges for synthesizer design; The synthesizer in such a system must cover a wide frequency range. On the other hand, since this standard employs Orthogonal Frequency Division Multiplexing, it must meet the stringent requirement of integrated phase noise over multiple decades of frequency. The synthesizer employs the phase-locked loop architecture. The frequency division method has been used to construct eight symmetrical phases. The designed synthesizer can generate a frequency range of 600 MHz to 5 GHz in 5 MHz steps with eight symmetrical phases and an integrated phase noise below -33 dBc. The synthesizer consumes 35-mW power from a 1.2-V supply
  9. Keywords:
  10. Frequency Synthesizer ; Wideband ; Phase Noise ; Phase Locked Loop (PLL) ; Orthogonal Frequency Division Multiplexing (OFDM) ; Multi-Phase Synthesizer

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