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An STT-MRAM Cache Management Scheme for Retention Failure Reduction

Mohammadi, Abdollah | 2022

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 55705 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Asadi, Hossein
  7. Abstract:
  8. Spin-Transfer Torque Magnetic RAM (STT-MRAM) is the most promising nonvolatile memory to replace SRAM technology in the Last-Level Cache (LLC) due to its benefits such as high density, near-zero cell leakage, and immunity to soft errors.However, due to its high retention failure and read disturbance rates in the downscaled technologies and the low data access rate in the LLC and the high number of read accesses, retention failure and read disturbance have become the main reliability challenges for STT-MRAM cache memory. The existing approaches to overcome these challenges impose significant area and performance overhead or adversely affect the other types of failures. In this thesis, we first investigate the parameters that affect the retention failure and read disturbance in detail. We observe that the duration of dead dirty blocks is the main contributor to the retention failure rate of STT-MRAM cache memories while the high number of risky reads, i.e., those that can lead to data loss, in the dirty blocks is the main contributor to the read disturbance. Thus the dirty blocks have significant impact on the reliability of STT-MRAM caches. Based on these observations, we propose a simple yet effective cache replacement policy, to decrease the length of dead dirty block intervals and the number of reads, which results in significant reduction in retention failure and read disturbance rate. Our evaluations demonstrate that the proposed replacement policy cuts down the probability of retention failure by 56% (69%) and decreases the number of risky reads per dirty blocks by 61% (66%) compared to the conventional Least-Recently Used (Re-Reference Interval Prediction) replacement policy. In addition, our proposed replacement policy improves the miss-rate by 0.2% compared to the LRU. These improvement were obtained with a negligible area overhead
  9. Keywords:
  10. Cache Memory ; Reliability ; Read Disturbance ; Spin Transfer Torque-Magnetic (STT-MRAM) ; Retension Failure ; Last Level Cache (LLC)

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