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Design of Linear Efficient Power Amplifier for Cellular Applications

Ebazadeh, Samira | 2024

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  1. Type of Document: Ph.D. Dissertation
  2. Language: Farsi
  3. Document No: 57627 (05)
  4. University: Sharif University of Technology
  5. Department: Electrical Engineering
  6. Advisor(s): Medi, Ali
  7. Abstract:
  8. Efficiency of a power amplifier (PA) as the most power consuming block of a cellular transmitter is crucial. In modern wireless communication systems, the use of spectrally efficient modulation scheme will result in signals with high peak to average power ratio. This means that a cellular PA operates at average output power most often. Thus, low PBO efficiency of a cellular PA could result in lower battery life and thermal problems. As a result, the PA power back-off (PBO) efficiency is as important as its peak efficiency in these applications. In conventional classes of PA like class AB and B, efficiency rapidly degrades with output power reduction. Thus, PBO efficiency improvement techniques should be used to enhance PA average efficiency. Doherty technique, which improves the PBO efficiency by modifying the load modulation behavior at PBO region, is the most popular approach due to it’s simplicity and high performance operation. A Doherty PA is composed of a main and an auxiliary amplifier in parallel biased in class-AB and -C, respectively. For PBO efficiency enhancement, the auxiliary PA is off at power levels lower than PBO. With input power enhancement, the auxiliary PA turns on and its output current modulates the load impedance of the main PA. The main impedance varies in a way that high efficiency is maintained over the whole PBO region. Lower fundamental current of a class-C biased auxiliary amplifier in a symmetrical DPA degrades the DPA performance and brings noticeable deficiencies like imperfect load modulation and reduced output power and efficiency. In this dissertation, a novel method based on the proposed passive voltage gain approach is presented to solve the peaking current issue. In this method, with utilization of the passive voltage gain concept in a symmetrical peak power division condition, the input matching networks are designed in a way that, signal in the auxiliary path experiences a higher voltage gain than the signal in the main path. As a result, the higher drive voltage of the auxiliary amplifier compensates for its lower gate bias and identical peak output currents for both amplifiers are achieved Using the proposed method, a symmetrical DPA with an 1B compression point of 21.3 dBm at 2.6GHZ is fabricated and implemented in a 0.18μm CMOS technology. Passive voltage gain concept in conjugate with a drive dependent input impedance of the auxiliary amplifier is utilized in implementing an input matching that helps the auxiliary PA to track its ideal current profile. These result in improvements in the DPA output power and efficiency. The measurement results of the fabricated DPA shows a power gain of 21 dB and a PAE better than 35% and 23% at P1dB and 6dB-PBO, respectively. Modulated signal simulations using a 64-QAM signal with a symbol rate of 10 MSys/s are performed to assess the DPA linearity behavior. Without DPD, at an average output power of 15.3 dBm, the EVM an ACLR are better than −26 dB and −29 dBc, respectively
  9. Keywords:
  10. Doherty Power Amplifier (DPA) ; Efficiency ; Passive Voltage Gain ; Peaking Current ; Power Back-Off (PBO)Efficiency

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