Sharif Digital Repository

In the present work, a new vertical cavity surface emitting laser (VCSEL) structure employing combined oxide layer and single defect photonic crystal index guiding layer has been investigated for L-band optical fiber application. The basic design goal was to obtain photonic crystal VCSEL (PhC VCSEL) with the high power, high slop efficiency and low threshold that operate at 1.55-1.6μm wavelength single mode region. By using the combination of photonic crystal and oxide layer, we have achieved high power VCSEL that operated fundamental mode. The influence of the hole etching depth of photonic crystal looking for the highest power and the lowest threshold current is also investigated  

The behavior of an electrified liquid jet breakup and modes of disintegration were investigated at different flow rates and voltages. The current phenomenology belongs to a new injector introduced recently by Morad et al. (2016). This injector has proven to highly extend the stability and flow rate of electrospray particularly in the Taylor cone-jet mode. The experimental investigation was performed using a high-power light-emitting diode (LED) illumination as the light source. The light source was developed to operate in the pulsing condition when synchronized with a digital camera and was particularly designed to function properly in the presence of high electromagnetic interference (EMI).... 

The capability level of rotary as well as first generation drilling operation could not be matched for deeply drilling programs. To reach that deep, the increasing in drill string length could also cause an additional constraint on hydraulic performance. The operation of slim hole drilling has significant potential to reduce well costs. This cost might be savings are especially important with increased demand for reduced capital finance under current economic conditions in the Iranian oil and gas industry. This savings achievement could be caused by use of smaller drilling rigs, work over rigs, reduced casing size, reducing requirement for drilling consumables and other costs associated with... 

A single chip UHF-RFID transceiver front-end is presented. The chip was designed according to EPCglobal Class-1 Gen-2 and supports both ETSI and FCC requirements. The receiver front end is capable of rejecting self-jammers as large as 10 dBm with the aid of a feedback loop. The stability and the robustness of the loop and other system requirements are studied. A 30 dBm class-AB power amplifier (PA) with 28% PAE is also integrated on the chip. The pseudo differential architecture of the PA greatly reduces the injection of the signal into the substrate. A simple model is used to estimate the effect of the substrate noise injection by the PA on the receiving circuit modules and design guides... 

The power supply of microwave tubes has high voltage and the possibility of produce high power pulse, which called in modulator. In this work, the results of design, construction and characterization of a direct drive pulse modulator for driving high power short pulse-width magnetron are reported. The sub-assemblies of modulator are; a primary high voltage supply, a switch bank with drivers and snubber circuits, a filament circuit, a digital control circuit with sensors and finally a pulse transformer. This paper is concerned with introduction and presentation of experimental evaluation of a new drive method for high power high voltage modulating-cathode microwave tubes. ©2009 IEEE  

In this paper, a new interleaved DC–DC converter based on a coupled and a single input inductor is proposed. The suggested high step-up converter utilizes various inductive and capacitive methods to transfer magnetic energy more efficiently. The output voltage is regulated with the switches' duty cycle and the coupled inductor (CI) turns ratio, which provide a wide output voltage range. Interleaving improves the converter reliability, employs both the first and third areas of CI's B-H plane, cancels DC component of the CI, and reduces the input current ripple of the proposed converter with twice switching frequency. Utilization of two output ports for voltage stress and ripple reduction in... 

Graphics Processing Units (GPUs) employ large register files to accommodate all active threads and accelerate context switching. Unfortunately, register files are a scalability bottleneck for future GPUs due to long access latency, high power consumption, and large silicon area provisioning. Prior work proposes hierarchical register file to reduce the register file power consumption by caching registers in a smaller register file cache. Unfortunately, this approach does not improve register access latency due to the low hit rate in the register file cache. In this article, we propose the Latency-Tolerant Register File (LTRF) architecture to achieve low latency in a two-level hierarchical... 

A single-chip Integrated circuit of 3.3 V/1 W class-D high fidelity and high efficiency audio power amplifier is presented in this paper. The design has been done using a 3.3 V/0.25 /spl mu/m CMOS process. The maximum output power is 1 W before the amplifier saturates. The THD+N at 0.5 W output power is below 0.03% and efficiency is better than 90% thanks to the careful design of the output stage. The dynamic range is more than 100 dB suitable for high fidelity audio applications. A single-loop single-bit third order sigma-delta modulator is used to generate the PWM signal from input audio signal. The PWM signal is then filtered at the output with a second order low pass filter external to... 

In the present work, a new structure of vertical cavity surface emitting laser (VCSEL) is designed and simulated. In this structure, InGaAsP is used as the active region which is sandwiched between GaAs/AlGaAs distributed bragg mirror at the top of structure and GaAs/AlAs distributed bragg mirror at the bottom. In this work, the hole etching depth was continued down to the top of lower spacer layer while in the previous work the hole etching depth was only down to top of the upper spacer. In this way, the threshold current decrement of 76.52% and increment the power by 28% from 5mW to 6.4mW at bias current of 9mA was achieved. In this paper, device characteristics such as light power versus... 

A high-power short-pulse generator based on the dual action of two coupled diodes, a high-voltage step recovery diode and a high-current diode, is presented. This is made possible using a gas discharge tube. Both analysis and SPICE simulation show about 20-dB peak power increment. This gives a high output power level of 5.7 MW with 1-ns pulsewidth and 450-kHz repetition rate obtained from an input average power of 7.1 kW. An efficiency of about 73% is obtained with more than 30 dB increase in the average power delivered to a 50-Ω load  

In this brief, a transformer-type power combiner for a fully integrated high-power CMOS power amplifier (PA) is presented. The proposed power combiner is composed of a number of transformers that, unlike the ones in conventional approaches, have different sizes. This leads to higher efficiency and smaller chip area. After considering several power stage topologies, analysis and optimization of the transformer network (the power combiner) are presented. To demonstrate the advantages of the proposed architecture, a 900-MHz CMOS PA with the proposed power combiner was implemented with a 0.18-μm radio-frequency CMOS process. The amplifier achieved an efficiency value of 24% at the maximum output... 

In this paper, a novel method for high-repetition-rate high-power radio frequency (RF) pulse generation, which involves only passive solid-state devices and is capable of being used for generating high power microwaves using a low-to-high power converting scheme based on nonlinear self-compression is proposed. The method is also expected to be of low jitter. In the proposed circuit, two high voltage diodes with proper reverse recovery characteristics are used. The simulation results show that the proposed circuit generates RF pulses, with central frequencies up to gigahertz range. By applying a sub-kilowatt power supply, the maximum output power was well over 10 kW. This power can be... 

In this article, a design methodology is presented to realize integrated class-F high-power amplifiers (HPAs). A harmonic-control network (HCN) is proposed to present short- and open-circuit impedances to each transistor employed in the output stage of the HPA at 2f_0 and 3f_0 frequencies. The HCN absorbs the parasitic capacitance of the transistor and lends itself to be absorbed in the matching and power combiner networks, reducing the die area of the HPA. A proof-of-concept 9.7-10.3-GHz class-F HPA was designed and implemented in a 0.25-μm GaAs pHEMT technology with VDD of 6 V. The designed HPA consists of two amplifying stages, and its output stage includes 16 transistors in parallel to...