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Improvement of post-fault performance of a cascaded h-bridge multilevel inverter

Ouni, S ; Sharif University of Technology | 2017

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  1. Type of Document: Article
  2. DOI: 10.1109/TIE.2016.2632058
  3. Publisher: Institute of Electrical and Electronics Engineers Inc , 2017
  4. Abstract:
  5. This paper is focused on improving the post-fault performance of cascaded H-bridge multilevel inverters by decreasing the common-mode voltage. First, an algorithm is proposed to determine the optimal post-fault state among all possible states, which have the same maximum available voltage. Furthermore, a modified technique is proposed to calculate the references of inverter phase voltages under faulty conditions. This technique leads to a decrease in the common-mode voltage when the required output voltage is less than its maximum value. These solutions are mutually employed in the post-fault control system. Simulation and experimental results confirm the effectiveness of the proposed solutions in comparison with the existing methods in different cases. © 2017 IEEE
  6. Keywords:
  7. Cascaded H-bridge multilevel inverter ; Common-mode voltage ; Fault-tolerant inverter ; Electric inverters ; Cascaded h-bridge multilevel inverters ; Common mode voltage ; Fault-tolerant ; Faulty condition ; Output voltages ; Phase voltage ; Bridge circuits
  8. Source: IEEE Transactions on Industrial Electronics ; Volume 64, Issue 4 , 2017 , Pages 2779-2788 ; 02780046 (ISSN)
  9. URL: https://ieeexplore.ieee.org/document/7752965