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Analyzing fault effects in the 32-bit OpenRISC 1200 microprocessor

Mehdizadeh, N ; Sharif University of Technology | 2008

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  1. Type of Document: Article
  2. DOI: 10.1109/ARES.2008.55
  3. Publisher: 2008
  4. Abstract:
  5. This paper presents an analysis of the effects and propagation of faults in the open-core 32-bit OpenRISC 1200 microprocessor. The analysis is based on a total of 13,000 transient faults injected into 65 parts of the CPU module in the OpenRISC 1200 core described at the RTL model. A comparison of the effects of faults on the various parts of the CPU including the pipeline's registers, the CPU component such as the register file, the control unit, and the ALU, and the data and address buses is done. It is shown that about 30%, 40% and 27% of injected faults terminated in address, data, and control errors respectively. About 28% of all injected faults resulted in failures. © 2008 IEEE
  6. Keywords:
  7. Address buses ; Control errors ; Control unit ; Fault effects ; International conferences ; Register files ; Transient faults ; Pipelines
  8. Source: ARES 2008 - 3rd International Conference on Availability, Security, and Reliability, Proceedings, 4 March 2008 through 7 March 2008, Barcelona ; 2008 , Pages 648-652 ; 0769531024 (ISBN); 9780769531021 (ISBN)
  9. URL: https://ieeexplore.ieee.org/document/4529404