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Using level restoring method for dual supply voltage

Sadeghi, K ; Sharif University of Technology | 2006

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  1. Type of Document: Article
  2. DOI: 10.1109/VLSID.2006.165
  3. Publisher: 2006
  4. Abstract:
  5. A new level converter for use in dual voltage SOI digital circuits is presented. This technique uses the idea of keeper transistors, and consumes less power compared to the traditional methods. The effects of load capacitance on the circuit are studied by extensive simulations. © 2006 IEEE
  6. Keywords:
  7. Analog to digital conversion ; Capacitance ; Digital circuits ; Electric loads ; Silicon on insulator technology ; Transistors ; Voltage control ; Keeper transistors ; Load capacitance ; Supply voltage ; Electric power systems
  8. Source: 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design, Hyderabad, 3 January 2006 through 7 January 2006 ; Volume 2006 , 2006 , Pages 601-605 ; 10639667 (ISSN) ; 0769525024 (ISBN); 9780769525020 (ISBN)
  9. URL: https://ieeexplore.ieee.org/document/4168335