Sharif Digital Repository

Studying data flows in conventional applications of Multi-Processor System-on-Chips (MPSoCs) denotes that most of these flows are the ones that transfer huge volume of data in inter-core communications. Previous works try to present architecture for interconnection network which some paths with low power and latency are reserved (statically or dynamically). However all of the presented methods are based on subnetworks or mechanism of transferring control messages (to establish a path and tear it down after transmission of data). Optical connections with low cost, low power and high bandwidth are good candidates to reduce power consumption of Network-on-Chips (NoCs). Therefore, using optical... 

The plausibility of embedding cycles of different lengths in the graphs of a network (known as the pancyclicity property) has important applications in Interconnection networks, parallel processing systems, and implementation of a number of either computational or graph problems such as those used for finding storage schemes of logical data structures, layout of circuits in VLSI and etc. OTIS network is an important Interconnection network that worth investigating. This kind of network has benefits of having electronic connection and optic connection simultaneously. Furthermore, independent of the technology of network, the topology of this network has importance. In this thesis, we have... 

As technology scales down Integrated Circuits operates at higher frequency and lower dimensions. Interconnects inside these chips operate at gigahertz frequencies and manometer range. As mean free path of electrons become comparable with wire dimensions and skin depth, first one will result in Size Effect and second one will result in Anomalous Skin Effect. In this thesis we are trying to characterize these effects. The MFP of electron for copper at room temperature is about 38nm and therefore neither Size effect nor ASE are measurable at room temperature with our available equipment. Hence, the idea is to measure ASE for copper wires at liquid nitrogen temperature (77K). We showed that ASE... 

In recent years, flash-based Solid State Drives (SSDs), because of their lower power consumption, higher throughput, and resistance against physical damages compared to Hard Disk Drives (HDDs) have confronted ever increasing usage in data center, cloud applications, and enterprise servers. Recently, advantages of using interconnection networks between SSD controller and NAND Flash chips for transferring data and commands have been shown. Interconnection network intrinsically provides many advantages such as maintaining the signal integrity at high frequencies, pipelining support, sharing the communication resources, eliminating communication bottlenecks, and reducing power consumption. The... 

In recent years applying solid state drives in data centers, cloud computing infrastructures and commercial servers have had a considerable growth. Low power consumption, high throughput and resistance to physical damages are some of the advantages of SSDs over HDDs. In recent works the necessity of using an interconnection network as a communication subcomponent between memory flash chips and disk controller is described. Disk mechanisms (mapping, wear-leveling and garbage collection) influence on throughput of the network. Based on this fact in this research an analytical model is provided considering disk mechanisms, flash chip structure and traffic characteristics. The error of the model... 

Recently, the size of copper interconnects is going to reach lower than the mean free path of electrons for copper. In this situation, we should consider the effect of other scattering mechanisms as well as thermal scattering on copper thin films. In this work we study both DC size effect and anomalous skin effect on resistivity by a Monte Carlo method. Contribution of each scattering mechanism and the interaction between them are analyzed separately. The structure of electrical field and distribution of current in thin films have also been studied. Investigating of the effect of exact nature of surface scattering and grain boundary scattering on resistivity is one of the interests of this... 

A parallel computer system is composed of a collection of processors used to speed up running a program or performance of multiple programs. If we consider the processors as nodes and the channels between processors as edges, the constructed graph represents an interconnection networks. Network topology affects performance and energy consumption of interconnection network very much. Some parameters of topology quality are low node degree and diameter, high connectivity degree and bisection width and symmetry. Since some of these parameters are in contrast with others, a network with more parameter improvements, is more desirable. Finding cycles with specific length and particularly ... 

Reducing interconnection costs on chip and power consumption are important issues in designing processors. In a processor, a significant amount of total chip power is consumed in the interconnection. The goal of this research is to find a way to reduce power consumption in the interconnection. In this project we propose a new data sending method in which an LZW-like compression algorithm is exploited to compress data before sending it over the interconnection. Then, the codes of the compressed data are sent through the interconnection in order to reduce the number of dynamic cycles. The simulation results show that using this method can reduce 52% of dynamic power consumption  

In this study, a Local Interconnect Network (LIN) transceiver was designed and implemented. This chip contains transmitter, receiver, low power receiver, digital control unit, oscillator, voltage regulator, high voltage switch, temperature sensor and battery voltage detector. The main focus on this study was on designing transmitter,receiver, low power receiver and temperature sensor. Through designing of this chip, in addition to functional and physical layer specification that mentioned in ISO 17987, electromagnetic compatibility specifications have been considered significantly.The designed chip with slope control and wave shaping of BUS signal has excellent radiated emission performance.... 

According to the increasing amount of data exchanged among data centers, the need for speeding up and bandwidth and reduced power consumption has been increased. The information show that about 77% of the data is moved into the data centers. On the other hand, 10% of data center’s power consumption is used to data transmission. Improving the interconnection network of data centers can play an important role in reducing power consumption and speeding up. In recent years, optical interconnects have gained attention as a promising solution. Nevertheless, offering an all-optical and efficient architecture is an important issue. In this study, we intend to provide a multi-stage, all-optical... 

The ever-expanding growth of internet traffic enforces deployment of massive Data Center Networks (DCNs) supporting high performance communications. Optical switching is being studied as a promising approach to fulfill the surging requirements of large scale data centers. Data center networks include hundreds of thousands of nodes that require flexible, high bandwidth, and low power infrastructures for their communications. Optical interconnection networks supply the required bandwidth, consuming much lower power compared to their electrical counterparts. The heterogeneous nature of data centers’ traffic needs a flexible network architecture which can be dynamically configured according to... 

In recent years, GPUs are becoming an ideal candidate for processing a variety of high performance applications. By relying on thousands concurrent threads in applications and the computational power of large numbers of computing units; GPGPUs have provided high performance and throughput. To achieve the potential computational power of GPGPUs in broader kinds of applications, we need to apply some modifications in their architecture. In the baseline architecture, the maximum part of chip area is devoted to SIMT cores which their communication is handled through an interconnection network and a slow off-chip memory. Recent research shows that out of many types of miss events the last level... 

Although a lot of research has been done on Carbon-based interconnect, there are many important questions unanswered. For example, there is no compact model for the resistance of bundle of CNTs at high frequencies, at which interconnects will be operating due to the scaling. Also there are many studies comparing CNT, GNR, and Cu wires but there is no study to show how much this will impact the design of a chip at today’s Giga Scale Integration. This comprehensive study should include chip performance, power dissipation and total number of metal levels. These two big questions are investigated in this dissertation. In the first part, high frequency behavior of CNT bundles is studied. A...