Sharif Digital Repository

This paper presents the design and implementation of a bidirectional distributed amplifier (BDDA) in a 0.18- boldsymbol mu ext{m} CMOS process. The performance of the BDDA is theoretically analyzed, and the optimum number of gain stages ( n-{ ext {opt}} ), maximum achievable power gain ( G-{P} ), and circuit bandwidth are formulated. In addition, a new formula for proper choice of the number of DA stages (i.e., n ) is offered where dc-power consumption of the circuit ( P-{ ext {dc}} ) is also considered. This formula optimizes G-{P}/P-{ ext {dc}} , and it is preferred over the conventional n-{ ext {opt}} formula. To validate the theoretical analyses, a 2-12-GHz BDDA with high output 1-dB... 

In this article, a design methodology is presented to realize integrated class-F high-power amplifiers (HPAs). A harmonic-control network (HCN) is proposed to present short- and open-circuit impedances to each transistor employed in the output stage of the HPA at 2f_0 and 3f_0 frequencies. The HCN absorbs the parasitic capacitance of the transistor and lends itself to be absorbed in the matching and power combiner networks, reducing the die area of the HPA. A proof-of-concept 9.7-10.3-GHz class-F HPA was designed and implemented in a 0.25-μm GaAs pHEMT technology with VDD of 6 V. The designed HPA consists of two amplifying stages, and its output stage includes 16 transistors in parallel to... 

This article applies a systematic approach based on the normalized determinant function (NDF) theory to analyse stability in multi-loop circuits and to design the required stabilization network. Presenting several provisions, the return ratios are extracted by employing immittance or hybrid matrices (Z, Y, G or H) of active two ports. Using these matrices, instead of the S-parameters, facilitates the selection of an appropriate stabilizer network. As a practical case, a non-uniform distributed amplifier (NDA) is designed and inspected for potential instabilities. The presented procedure detects instability associated with one of the NDA circuit's loops, and an appropriate stabilization... 

In this article, a design methodology is presented to realize integrated class-F high-power amplifiers (HPAs). A harmonic-control network (HCN) is proposed to present short- and open-circuit impedances to each transistor employed in the output stage of the HPA at {2}f {0} and {3}f {0} frequencies. The HCN absorbs the parasitic capacitance of the transistor and lends itself to be absorbed in the matching and power combiner networks, reducing the die area of the HPA. A proof-of-concept 9.7-10.3-GHz class-F HPA was designed and implemented in a 0.25- μ ext{m} GaAs pHEMT technology with V {DD} of 6 V. The designed HPA consists of two amplifying stages, and its output stage includes 16... 

In this article, a design methodology is presented to realize integrated class-F high-power amplifiers (HPAs). A harmonic-control network (HCN) is proposed to present short- and open-circuit impedances to each transistor employed in the output stage of the HPA at {2}f {0} and {3}f {0} frequencies. The HCN absorbs the parasitic capacitance of the transistor and lends itself to be absorbed in the matching and power combiner networks, reducing the die area of the HPA. A proof-of-concept 9.7-10.3-GHz class-F HPA was designed and implemented in a 0.25- μ ext{m} GaAs pHEMT technology with V {DD} of 6 V. The designed HPA consists of two amplifying stages, and its output stage includes 16... 

This article presents the theory and implementation of a quadrature and differential RF front-end receiver. Combining balun, low-noise amplifier (LNA), mixer, and oscillator in a single stage, the proposed circuit, named the Blixator, is well suited for low-power applications. The baseband's transimpedance amplifier (TIA) also shares part of its dc current with the Blixator cell, resulting in sub-milliwatt power consumption. To avoid additional power and area by quadrature LO generation, the I/Q signals are generated at RF, employing the inductors already required for providing the dc current path of the LNA transistors. The expressions for gain, noise figure (NF), and phase noise of the...