Sharif Digital Repository

Today, phased array antennas have important role in wireless communication systems. Utilizing optimum channel capacity, having better signal to noise ratio and, high data rate are the most important features of these systems. These systems are composed of several thousands of separated transceivers which provide possibility of directional electromagnetic radiation by changing the phase and the amplitude of the signal in each transceiver independently. So, the main components of such a system are amplifiers, phase shifters and, amplitude controllers. Also a high resolution phased array military radar system is another vital applications of these systems at frequency band of 9-10 GHz. The... 

In this thesis, a new wide band variable gain distributed amplifier (VGDA) is presented. A novel approach to implement uniform gain control in the wide band frequency range of 8 – 18 GHz is demonstrated. A different technique has been employed to provide necessary DC bias current, avoiding large DC-Feed inductors. A five-section wideband VGDA has been designed and fabricated in 0.18 μm CMOS technology. The VGDA have a flat gain of 11 dB, noise figure better than 5 dB, P1dB of 14 dBm at the output, input and output matching better than -12 dB and -14 dB, respectively, for maximum gain state over the 10 GHz UWB band. The gain control range is between 3 – 11 dB with gain steps of 0.5 dB and rms... 

In this project, a “Ku” band (16.3GHz-17.3GHz) 6-bit phase shifter for realizing a phase array T/R module is designed, implemented and measured in CMOS 0.18μm technology. Design specifications for this block were: RMS phase error should be less than 2.5 degree in bandwidth, better than 12dB loss and better than 16dBm input 1dB compression point. High-pass/low-pass filter structure is used to implement this phase shifter. In order to decrease phase shift error in process and temperature corners, a new structure for one of bits was introduced. This structure is less sensitive to process and temperature corners and furthermore it conSumes less area in layout, but it has more loss variation... 

In this study, a Local Interconnect Network (LIN) transceiver was designed and implemented. This chip contains transmitter, receiver, low power receiver, digital control unit, oscillator, voltage regulator, high voltage switch, temperature sensor and battery voltage detector. The main focus on this study was on designing transmitter,receiver, low power receiver and temperature sensor. Through designing of this chip, in addition to functional and physical layer specification that mentioned in ISO 17987, electromagnetic compatibility specifications have been considered significantly.The designed chip with slope control and wave shaping of BUS signal has excellent radiated emission performance.... 

In this thesis, two types of smart switch & driver chips are designed in 0.18 um HV BCD technology; low side driver and high side driver. These drivers are smart, because of having various types of protection and detection circuits, which protect switch, driver and connected load, versus errors that can be occurred by the user or other environmental effects. The protection circuits are battery over & under voltage shutdown, current limit, inductive load clamper and thermal shutdown. Load status is checked by status detection circuit and reported to user by one bit flag. Battery voltage can vary from 7 V to 40 V and output current is limited to 2 A. Designed high side and low side drivers are... 

In this thesis, a low-power low-phase-noise 28 GHz voltage-controlled oscillator for 5G applications is presented. At first, to select the best structure in terms of FoM, various types of inductors and transformers have been designed and EM simulated. The class-C structure which leads to the highest FoM is chosen eventually. In order to increase oscillation amplitude and reduce phase noise while preserving FoM, a high-frequency noise filter is presented. This filter which is based on a λ/8 microstrip transmission line has solved the conventional filter problems e.g. narrow bandwidth, coupling with oscillator inductor and practical implementation issues.The oscillator is designed, EM... 

Oscillators are an important building block in the design of synthesizers for RF system applications. State-of-the-art operation defines that an oscillator should have the best spectral purity while consuming a low amount of power. In recent years, several methods have been presented for reducing phase noise separately in the 1/f2 and 1/f3 regions. As CMOS technology advances, the amount of power supplies decreases, which worsens the inherent flicker noise. In this thesis, it has been tried, while investigating the existing methods in the phase noise in this region, it presents the proposed oscillator which is based on a three-coupled transformer. This voltage bias oscillator operates at a... 

The signal sources, based on CMOS technology at mm wave have two categories, the first class is a harmonic oscillator and the second class is fundamental oscillator followed by a frequency multiplier. A systematic approach to obtain the upper bound of efficiency using the activite device condition and, oscillation condition is implemented. Based on polyharmonic distortion at large signal operation, harmonic translation and efficiency are optimized. It is shown that there is an optimum phase for voltage of harmonics at the oscillator ports (the gate and the drain).Based on this analysis, a 300 GHz harmonic oscillator, simulated in TSMC 65nm CMOS is designed. The proposed oscillator has an... 

Some applications need fast locking clock and data recovery circuits for example the circuits that operate in burst mode must lock to the data packets which are transmitting from different transmitters very quickly and in just a few bit times. In such applications open-loop clock and data recovery circuits are used because lock time in closed-loop clock and data recovery circuits is usually much longer.
In this thesis a new open loop clock and data recovery circuit based on injection locking method has been proposed. This circuit can be used in applications such as passive optical networks that need fast locking. In this architecture a super harmonic injection-locked frequency divider... 

Nowadays, frequency synthesizers are widely used in many modern devices due to the ever-increasing growth of electronic circuits and their applications in various aspects of life. Imaging devices with security applications in the millimeter-wave frequency band is one of the mentioned applications. To prevent crowds at checkpoints and facilitate traffic, these devices need to monitor people's security at the highest possible speed. Furthermore, significant bandwidth is required to increase image quality. Therefore, using frequency generators with high-speed frequency sweep ability is a great advantage. In this thesis, a digital frequency generating chip with 1GHz bandwidth is designed using... 

In this study، a novel frequency multiplier chain for wideband millimeter-wave applications at 28 GHz is presented. Millimeter-wave imaging systems require high frequency and wide bandwidth to accurately detect hidden objects. Various methods have been proposed to increase the frequency of generated signals, but in the meantime، frequency multiplier structures exhibit better performance in terms of bandwidth، power consumption and, harmonic rejection. These circuits are widely used in High-frequency telecommunication systems such as 5th generation mobile services. To design a frequency quadrupler، two multiplier stages based on the improved quadrature Gilbert structure were used. Generating... 

Electro Static discharge (ESD) in ICs can damage them. To prevent ICs from being damaged by ESD, protection circuits must be used. These protection circuits can be either designed on chip or on PCBs, to be more protective, both can be used. In this thesis, 8 kV ESD protection circuits according to human body model (HBM) in high voltage 0.18 um CMOS technology has been designed. In this thesis, in addition to study of electro static discharge phenomenon and its protection circuits, we have designed high voltage pads which are protected against 8 kV electro static discharge according to human body model. Finally these pads have been used in automotive ICs. In this thesis, firs we have... 

Removing SAW filter from the input of a receiver makes the receiver extremely vulnerable to all sorts of blockers and interferers. It is shown in this thesis that due to existing large out-of-band blockers the linearity of the saw-less receiver has to be considerably higher than that of the conventional receivers with input SAW filter. These ever-present and unwanted signals that show up in the absence of the input SAW filter are divided into two groups of far and near out-of-band blockers and interferers. It is shown that removing these groups of unwanted signals require two distinct approaches, one for near and the other for the far out-of-band blockers. An inclusive solution to protect... 

A high-Q tunable bandpass filtered amplifier structure is proposed which is based on N-path Q enhancement. Using Fourier series analysis, frequency response of an N-path filter and aliasing effect of this filter is achieved. This effect is caused by frequency translation to bandpass frequency as harmonic fold back (HFB). It is shown that using an additional N-path filter with the same clock frequency but different clock phase HFB is reduced. The conditions for fold back elimination are derived from Fourier series expansions for switched signals. In order to realize HFB reduction and increasing stop-band rejection and Q factor, an LNA associated with N-path filter is added to each of the... 

The purpose of this thesis is designing and implementation of a Carry Skip Adder using CMOS traditional technology and Gate Diffusion Input technique (GDI). I present a carry skip adder (CSKA) structure that has a higher speed, lower energy consumption compared with the conventional one. The Gate Diffusion Input is a novel technique for low power digital circuit design. This technique reduces the power dissipation, propagation delay, area of digital circuits and it maintains low complexity of logic design  

There is a strong drive toward handheld communication devices with building blocks that are fully integrated in standard CMOS technologies. Although there are obvious cost, size, and repeatability advantages, it is particularly challenging to implement fully integrated power amplifiers with no external matching in standard CMOS under the large supply variations and harsh load mismatches present in handheld devices. This Project deals with the front-end of an Integrated RFID Reader for the UHF band. The bottleneck of the design is the design of a fully on-chip Power Amplifier. In this thesis, a new method is introduced to increase transistors breakdown voltage in a class E power amplifier.... 

This project is dedicated to design and implementation of a 77 GHz Power Amplifier for FMCW automotive radar application. Design of this type of Power amplifier faces several main challenges. The first challenge is due to the limits of technology used for implementing the power amplifier design (CMOS 65nm), for example the low breakdown voltage of transistors forces us to use low supply voltage. The other challenges are high frequency effects and complexity of design in mm-wave frequency. however, there are phenomena which dont have any important effect on output results in low frequency, but we should consider those when designing Power Amplifier in mm-wave frequencies.In order to... 

A Radio Frequency Power Amplifier was designed for IS-95 standard in 0.18μm / 1.8V CMOS technology. In order to increase output voltage swing and protect gate oxide of devices, pseudo-differential cascode topology was exploited. Bondwire inductors with exact modeling were used to tune out parasitic capacitances. A low-pass, L match impedance transformation network, realized using bondwire inductors, was used at output of power amplifier. An impedance transformation network design process was developed which considers the quality factor of inductors, from the first step. Also having examined the nonlinearity phenomena in power amplifiers, a fast simulation or measurement method was proposed... 

Advances in IC fabrication makes possible have systems on chips. In this thesis we have designed and fabricated a digitally controlled bias chip for a transceiver which can be programmed by its digital interface. In this thesis, briefly we review basics of voltage regulators and methods for controlling them. Then we introduce high voltage 0.18um CMOS technology. In this thesis, we describe the requirements of a specific transceiver and present a system to overcome these requirements. This system has positive, negative and internal regulators, a five-bit analog to digital converter, temperature sensors, power amplifier controller and digital serial interface. In this thesis, we present a... 

Impedance spectroscopy is known as one of the important integrated sensing methods in micro scale Biosensors and electrochemical sensors. Recently, Impedance spectroscopy has been noticed in many micro scale applications. These micro scale applications is being developed specially in bioelectronics and biomedical. The goal of this thesis is designing an on-chip impedance spectroscope system for high frequency with 10 bits resolution via fully electrical blood glucose concentration measurement. This system extracts the blood glucose concentration data through measuring the permittivity coefficient of blood at 1 GHz frequency. In this thesis, new method for high frequency high resolution...