Sharif Digital Repository

Editor's note: Due to increasing process, voltage, and temperature (PVT) variability, reliability is becoming a growing worry. This article addresses this concern with a combination of software and hardware hardening modes while considering power, performance, and overhead constraints. Similar to other examples in this special issue, this work illustrates that complex management tasks that have to integrate multiple objectives, goals, and constraints require a comprehensive understanding of the system's state. - Axel Jantsch, TU Wien - Nikil Dutt, University of California at Irvine. © 2013 IEEE  

A low-power technique for high-resolution comparators is introduced. In this technique, p-type metal-oxide-semiconductor field-effect transistors are employed as the input of the latch of the comparator just like the input of the preamplifier. The latch and preamplifier stages are activated in a special pattern using an inverter-based controller. Unlike the conventional comparator, the preamplification delay can be set to an optimum low value even if after the preamplification, the output voltages is less than n-channel metal-oxide semiconductor voltage threshold. As a result, the proposed comparator reduces the power consumption significantly and enhances the speed. The speed and power... 

Long and continuous running of software can cause software aging-induced errors and failures. Cloud data centers suffer from these kinds of failures when Virtual Machine Monitors (VMMs), which control the execution of Virtual Machines (VMs), age. Software rejuvenation is a proactive fault management technique that can prevent the occurrence of future failures by terminating VMMs, cleaning up their internal states, and restarting them. However, the appropriate time and type of VMM rejuvenation can affect performance, availability, and power consumption of a system. In this paper, an analytical model is proposed based on Stochastic Activity Networks for performance evaluation of... 

In this paper, Stochastic Activity Networks (SANs) are used to model and evaluate the performance and power consumption of an Infrastructure-as-a-Service (IaaS) cloud. The proposed SAN model is scalable and flexible, yet encompasses some details of an IaaS cloud, such as Virtual Machine (VM) provisioning, VM multiplexing, and failure/repair behavior of VMs. Using the proposed SAN, a power-aware self-adaptive resource management scheme is presented for IaaS clouds that automatically adjusts the number of powered-on Physical Machines (PMs) regarding variable workloads in different time intervals. The proposed scheme respects user-oriented metrics by avoiding Service Level Agreement (SLA)... 

Multicore platforms provide great opportunity for implementation of fault-tolerance techniques to achieve high reliability in real-time embedded systems. Passive redundancy is well-suited for multicore platforms and a well-established technique to tolerate transient and permanent faults. However, it incurs significant power overheads, which go wasted in fault-free execution scenarios. Meanwhile, due to the Thermal Design Power (TDP) constraint, in some cases it is not feasible to simultaneously power on all cores on a multicore platform. Since TDP is the maximum sustainable power that a chip can consume, violating TDP makes some cores automatically restart or significantly reduce their... 

With the widespread use of Internet of Things (IoT) in every aspect of human's daily life, communications of such an enormous amount of existing embedded devices in these systems arise many new challenges from power consumption, performance, and reliability perspectives. Communications in an IoT infrastructure are managed by a set of policies which are determined by Objective Functions (OFs). Thus, OFs are the most important contributors in facing with the mentioned challenges. In this paper, due to the lack of information on how OFs affect the primary properties of an IoT infrastructure, we have compared three well-known OFs (OF0, MRHOF, and OFFL) from power consumption, performance, and... 

We propose an energy-efficient procedure for transponder configuration in few-mode fiber-based elastic optical networks in which bit error rate and physical constraints are guaranteed and joint optimization of temporal, spectral, and spatial resources are addressed. We use geometric convexification techniques to provide convex formulations for the signal-to-interference plus noise ratio, transponder power consumption, and transponder configuration problem. Simulation results demonstrate that the proposed convex formulation for the transponder configuration problem is considerably faster than its mixed-integer nonlinear counterpart. We consider transmit optical power as a configurable... 

This paper presents the design of a fault-tolerant universal asynchronous receiver transmitter (UART) called micro-FT-UART for safety-critical SoC-based applications. This UART exploits advantages of three fault-tolerant techniques to tolerate soft errors. The three techniques are triple modular redundancy (TMR), Hamming code and a new technique called correction by parity storing (CPS). An VHDL model of a micro-UART is simulated by the ModelSim v.6.0 and synthesized by the Synopsys Design Compiler v.X-2005.09- SP2. About 1000 single-bit errors and 1000 multiple-bit errors are injected into different parts of the micro-UART to find out the error sensitivity of each specific part. Considering... 

This paper presents a hybrid adaptive network based fuzzy inference system (ANFIS), computer simulation and time series algorithm to estimate and predict electricity consumption estimation. The difficulty with electricity consumption estimation modeling approach such as time series is the reason for proposing the hybrid approach of this study. The algorithm is ideal for uncertain, ambiguous and complex estimation and forecasting. Computer simulation is developed to generate random variables for monthly electricity consumption. Various structures of ANFIS are examined and the preferred model is selected for estimation by the proposed algorithm. Finally, the preferred ANFIS and time series... 

Based on the observation that dynamic occurrence of zeros in the cache access stream and cache-resident memory values of ordinary programs exhibit a strong bias towards zero, this paper presents a novel CMOS four-transistor (4T) SRAM cell for very high density and low power cache applications. This cell retains its data with leakage current and positive feedback without refresh cycle. The new cell size is 20% smaller than a conventional six-transistor cell using same design rules and delay access of a cache based on new 4T SRAM cell is 32% smaller than a cache based on 6T SRAM cell. Also the dynamic and static power consumption of new cell is 40% and 20% smaller than 6T SRAM cell,... 

There is growing interest in evaluating the impact of soft errors on multiprocessor system-on-chip (MPSoC) at application-level rather than architectural-level, particularly in multimedia applications to optimize system design. This has recently led to the concept of application-level correctness. In this paper, we consider the relationship between application-level correctness and system-level power management using voltage scaling technique with the aim to generate designs that are optimized in terms of power consumption, while providing acceptable application-level correctness and meeting real-time performance deadlines. We propose a novel voltage scaling technique based on linear... 

A novel low power with high performance low current comparator is proposed in this paper which comprises of low input impedance using a simple biasing method. It aimed for low power consumption and high speed designs compared with other high speed designs. The simulation results from HSPICE demonstrate the propagation delay is about 0.7 ns and the average power consumption is 130 μW for 100 nA input current at supply voltage of 1.8 V using 0.35 micron CMOS technology. © 2009 IEEE  

Internet of Things (IoT) devices have strict necessity for power consumption in order to achieve expected battery life. IoT nodes feature extreme power consumption range over 100 dB, between their operating modes. The main focus of this paper is to design and implement a high precision, high dynamic range, low power, and flexible power measurement system, which can be applied to different applications. The proposed system consists of a voltage regulating control loop, zero offset amplifiers, high precision analog to digital converters, and reference voltage. The proper operation of the proposed circuit are verified numerically with simulations and experimental measurements. The implemented... 

In the case that phased array systems are not capable of attenuating interferences, Radio Frequency (RF) front-ends and Analog Digital Converters (ADCs) with a large dynamic range are required to avoid saturation of the receiver. This leads to a higher power consumption. In this paper, employing N-path circuits in Mixer-First receivers, a novel method is introduced in which spatial and frequency blockers are eliminated right before entering the system on the antennas input. In fact using this technique, adjustable spatial notch filter and band-pass frequency filter are implemented to suppress spatial and frequency interferences. The proposed method enhances the robustness and effectiveness... 

In high-speed analog-To-digital converters (ADCs), two main factors contribute to high power consumption. The first is the super linear relationship with the sampling rate; i.e., by doubling the sampling rate, the power consumption more than doubles. The second factor arises from the consumption of analog circuitry responsible to mitigate the jitter noise. By employing a multichannel sampling system, one can achieve high sampling rates by incorporating multiple low sampling-rate channels, which results in a linear scaling of power consumption with the number of channels. The main drawback of this system is the timing mismatch between the sampling channels. In this paper, we intend to jointly... 

Infrastructure as a Service (IaaS) is one of the most significant and fastest growing fields in cloud computing. To efficiently use the resources of an IaaS cloud, several important factors such as performance, availability, and power consumption need to be considered and evaluated carefully. Evaluation of these metrics is essential for cost-benefit prediction and quantification of different strategies which can be applied to cloud management. In this paper, analytical models based on Stochastic Reward Nets (SRNs) are proposed to model and evaluate an IaaS cloud system at different levels. To achieve this, an SRN is initially presented to model a group of physical machines which are... 

The emergence of mobile IoT applications in recent years and the challenge of routing in their infrastructures have motivated scholars to propose appropriate routing mechanisms for such systems. Meanwhile, the IPv6 Routing Protocol for Low Power and Lossy Networks (RPL) is the standard routing protocol for IoT infrastructures. Nevertheless, RPL was mainly designed to comply with the primitive requirements of static IoT applications and it behaves poorly in confronting with the severe alterations in mobile conditions. The most important factor for such a poor behavior in mobile applications is the inappropriate design of OFs, which determine RPL's routing policies in the network. Therefore,... 

In this work, we address peak power and maximum temperature in multi-core Mixed-Criticality (MC) systems. In these systems, a rise in peak power consumption may generate more heat beyond the cooling capacity. Additionally, the reliability and timeliness of MC systems may be affected due to excessive temperature. Therefore, managing peak power consumption has become imperative in multi-core MC systems. In this regard, we propose an online peak power management heuristic for multi-core MC systems. This heuristic reduces the peak power consumption of the system as much as possible during runtime by exploiting dynamic slack and Dynamic Voltage and Frequency Scaling (DVFS). Specifically, our... 

Traditionally, DVFS has been the main mechanism to trade-off performance and power. We observe that Deep Neural Network (DNN) applications offer the possibility to trade-off performance, power, and accuracy using both DVFS and numerical precision levels. Our proposed approach, Power-Inference accuracy Trading (PIT), monitors the server's load, and accordingly adjusts the precision of the DNN model and the DVFS setting of GPU to trade-off the accuracy and power consumption with response time. At high loads and tight request arrivals, PIT leverages INT8-precision instructions of GPU to dynamically change the precision of deployed DNN models and boosts GPU frequency to execute the requests... 

Storage subsystem is considered as the performance bottleneck of computer systems in data-intensive applications. Solid-State Drives (SSDs) are emerging storage devices which unlike Hard Disk Drives (HDDs), do not have mechanical parts and therefore, have superior performance compared to HDDs. Due to the high cost of SSDs, entirely replacing HDDs with SSDs is not economically justified. Additionally, SSDs can endure a limited number of writes before failing. To mitigate the shortcomings of SSDs while taking advantage of their high performance, SSD caching is practiced in both academia and industry. Previously proposed caching architectures have only focused on either performance or endurance...