Sharif Digital Repository

Due to the expansion of digital system threats, trusted computation with a new approach for countering such threats has emerged. This approach is based on using a hardware module for implementing a trusted platform (TPM). TPM includes a chipset and the trusted systems core. Nowadays many of mobile computers do include this technology. This hardware creates trust using a trust chain and expanding this trust to other parts of the system. The starting point in this chain is the computer BIOS. BIOS is the first code that the system usually executes. One of the most powerful recent attacks on computer systems is to infect the BIOS and other firmware. One of such complicated attacks is the rootkit... 

Reconfiguration, short development time and low cost have made Field Programmable Gate Arrays (FPGAs) an appealing option for digital circuit designers. Meanwhile, the occurrence of Single Event Upset (SEU) in configuration memory of SRAM-based FPGAs can change the implemented design inside the FPGA chip. Assessing reliability of FPGA-based designs against pernicious effects of SEU has long been a challenge. Several approaches can be used to evaluate the reliability of a given design. One important approach is injecting fault into the configuration memory of a device.The existing fault injection frameworks are specific in the property e.g. providing speed only, neglecting other properties of... 

Reconfigurable devices are a popular platform for fast prototyping of digital system due to having high performance of hardware implementation along with flexibility of software. However, reconfigurable devices suffer from area, performance and dependability gaps in comparison with their Application Specific Integrated Circuit (ASIC) counterparts, which greatly limits their application.
The dependability gap originates from the sensitivty of configuration memory to soft errors. When a reconfigurable device configuration memory is affected by soft errors, their configuration will be invalid until reconfigured. Since the routing fabric is the origion of over 80% of soft errors in... 

Distributed stream processing frameworks (DSPFs) are used for real-time processing of big data. Apache Storm is one of the most popular stream processing systems in industry today. By increasing data generation rate we need new methods to overcome processing requirements of DSPFs like Apache Storm. In this thesis we investigate the feasibility of incorporation FPGA acceleration into Apache Storm. Using FPGAs as co-processors in powerful servers can improve performance and accelerate processing of streaming data by increasing parallelism, decreasing processing time of each processing units and decreasing communication delay between these units. Our design includes a hardware part that... 

In recent years, big data processing plays an important role in the era of information technology. The exponential growth of big data volume increases the need for data centers and infrastructures with more processing power. Due to dark silicon and scalability limitations in deep-submicron, the increasing trend of server performance slows down. Therefore, hardware accelerators such as FPGA and GPU are become increasingly popular for improvement of data center processing power. There are two types of big data processing based on the application: stream processing and batch processing. With the widespread use of social networks, online control systems and internet of things services, the... 

Vulnerability of SRAM-based FPGAs to soft errors signals the importance of applying fault-tolerant methods in FPGAs used in safety-critical applications. Previous methods to protect SRAM-based FPGAs impose significant area and power overheads. Additionally, they suffer from susceptibility of configuration bits to Single Event-Multiple Upsets (SEMU). This thesis presents a Highly Available Fault-Tolerant Architecture (HAFTA) to protect SRAM-based FPGA designs against SEMUs in both configuration and user bits. In HAFTA, the entire design is duplicated and the main and replica flip-flops are compared at each clock cycle to detect any possible mismatch. To save the latest correct state of the... 

Automatic modulation recognition is an improving area in signal processing that has been interest of research institutes in recent years. Every signal intelligence system consists of three parts: Front, middle prcessing, Output. which Automatic recognition system is in the middle processing. Vast researches has been done on front and output section. By the way output section demands proper work by modulation recognition section in order to work appropriately. With the right knowledge of the receiving modulation, output section can jam or demodulate the receiving signal by demand. Intrapulse modulation in this research is the meaningful variation of frequency, amplitude or phase of a signal.... 

Spiking Neural Networks(SNN) are networks which are consisted of layers of neurons, like other typical artificial neural networks. The main difference between SNN and other neural networks is the type of data transportation among neurons which is done by spikes. Spiking neural networks and their models are considered as the nearest networks and neurons to animals’ nervous systems. In aspects of hardware implementation, the type of data transportation in SNN causes them to be ultra-low power. So, implementation of these networks on chips like FPGA and also usage of SNN in applications with high processing load have startling germination, recently. In this work, we have tried to propose some... 

With the advent of technology, small in size sensors, memory, speeding up the processor and lowering the cost, it is possible to build an embedded camera system. The goal of this project is to design and build an embedded camera system so it can execute any set of necessary algorithms as depending on the application. In this project, two models of embedded camera systems have been presented as an integrated system and a system with independent units. To design the integrated embedded system, ZYNQ processor is used and two structures are presented in the form of hardware-software and hardware design. In hardware-software design, image processing operations are done by software and in hardware... 

Designing artificial intelligence based arithmetic machines that can intelligently perform human-like task has attracted considerable interest among researchers. The ever-increasing advances in soft-computing algorithms require appropriate hardware platforms for such algorithms. One of the most important problems with these algorithms and their hardware implementation structures is the discrepancy between the hardware and the nature of the problem. It can be argued that paying attention to hardware implementation does not necessarily guarantee an optimal implementation of these algorithms. Most of the proposed hardware implementations have very small resemblance to the biological systems... 

Reliable communication has become very crucial in the transmission applications. Hence, to design hardware to handle reliability is the most important part of communication. In this work, we propose a new secured ALU (Arithmetic and Logic Unit) against fault attacks that is used in ARM processor which can correct any 5-bit error in any position of 32-bit input registers of ALU. We also designed a BCH (Bose, Chaudhuri, and Hocquenghem) codec (encoder, decoder) using the prototyping FPGA. Further, in this thesis we designed (63, 36) the BCH encoding and decoding system to tolerate the 5-bit faults. The codec system and ALU system are based on using Verilog description language. Since... 

In recent years, along with development of technology and decrease in size of digital devices, copying and editing of digital multimedia products has become easier. Also, broadband technology caused simpler distribution of data. Considering above mentioned problems, we can use watermarking. Nowadays, watermarking has many applications such as secure transmission of data, owner identification, proof of ownership, authentication, broadcast monitoring etc. Watermarking is the process of hiding information in a secure host, in a way that it does not change the quality of signal. Watermarking is the science and art of hiding secret information in which neither the sender nor the receiver would... 

Digital Signal Processing (DSP) is used in a wide range of applications such as high-definition TV, digital audio, multimedia, digital cameras, radar, sonar detectors, biomedical imaging, global positioning, digital radio, speech recognition and etc. These applications can be implemented by either DSP processors or FPGA technology. Digital Signal Processors are microprocessors specifically designed to handle Digital Signal Processing tasks. These devices have seen a tremendous growth in the last decade, finding use in everything from cellular telephones to advanced scientific instruments. On the other hand, the rise of FPGA in the signal processing realm could be assigned to hardware to... 

In recent years, emerging Non-Volatile Memories (NVMs) have become promising alternatives for existing memory technologies. Due to shortcomings of SRAM memory in nanometer era,NVMs such as Phase-Change Memory (PCM) can be used in configuration memories of Field-Programmable Gate Arrays (FPGAs). Despite prominent features of emerging NVMs, they suffer from high write-power, high write-latency, and limited number of reliable write opera-tions. In addition, a dedicated Peripheral Circuit (PC) which is required to convert the NVM state to the equivalent voltage level can impose significant area and power overheads to FPGAs.In this thesis, a reliable power-efficient hybrid architecture employing... 

AC/DC/AC converters are widely being used in a variety of power applications. Continuity of service of these systems, as well as their reliability and performance are now of the major concerns. Indeed, the failure of the converter can lead to the total or partial loss of the control of the phase currents and can cause serious system malfunction or even shutdown. Thus, uncompensated faults can quickly endanger the system. Therefore, to prevent the spread of the fault to the other system components and to ensure continuity of service, fault tolerant converter topologies associated with quick and effective fault detection and compensation methods must be implemented. In this thesis, the... 

With growing interest in the use of SRAM-based FPGAs in space and other radiation environments, there is a greater need for efficient and effective fault-tolerant design techniques specific to FPGAs. The soft errors vulnerability of SRAM-based FPGAs limits their usage in safety-critical applications. Moreover, the rate of multiple soft errors increases due to the feature size reduction. Hence, this issue becomes a challenge against reliability of the implemented circuit on SRAM-based FPGAs. Appealing to specifics such as low cost and re-configurability in SRAM based FPGAs provide this ability to change implemented design remotely. This advantage is not negligible in safety critical... 

RT-level techniques are one of the most important categories of techniques employed for decreasing power consumption in digital systems. These techniques are usually applied in the HDL description of the system, however some of them are applicable automatically by the synthesis tools. Some of the most commonly used RT-level techniques include Operand isolation, Clock gating, Concurrency & Redundancy, Pre-computation and Pipeline for low power. However these techniques have been mostly employed in ASIC designs, and FPGAs have scarcely been addressed. Application of these techniques on FPGAs might need special considerations, since resources on FPGAs are inherently different than their ASIC... 

Nowadays, embedded processors are widely used in wide range of domains from low-power to safety-critical applications. By providing prominent features such as variant peripheral support and flexibility to partial or major design modifications, Field-Programmable Gate Arrays (FPGAs) are used in industry for implementing either an entire embedded system or a Hardware Description Language (HDL)-based processor, known as soft-core processor. FPGA-based designs, however, suffer from high power consumption, large die area, and low performance that hinders common use of soft-core processors. In this thesis, we present an efficient reconfigurable architecture to implement embedded processors in... 

Five-Level Active-Neutral-Point -Clamped (5L-ANPC) converter is used for medium-voltage and high-power applications. In many of these applications, availability and robustness against fault are the most important issues. On the other hand, this converter is made of a large number of power semiconductor switches, diodes and capacitors which could increase the failure probability. Thus, fault detection of power circuit elements is necessary for fault tolerant operation of the converter. In this thesis, following an introduction to the topology and operation principles of Five-Level Active Neutral point clamped converter, a novel open-circuit fault detection and localization method is... 

With the proliferation of Internet-based applications and malicious attacks, security has become one of the most influential aspects in the network and, it should be considered from the beginning steps of designing the network infrastructure. Based on the fact that pattern matching is considered as one of the most important roles of security devices or applications, it becomes an important procedure in firewalls that have been classified as security equipments which adopt a security mechanism in order to restrict the traffic exchanged between networks and particular users or certain applications. While the trend of using compressed traffic is drastically increasing, this type of traffic is...