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Evaluating the Energy Consumption of Fault-Detection Mechanisms in Embedded Systems

Fakhraei, Mohammad | 2013

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 45027 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Ejlali, Alireza
  7. Abstract:
  8. Memories are one of the main component in the embedded systems, and owing to their vulnerability to error, this part of system must be fault tolerant. Single error correction (SEC) codes are one of the most commonly used methods against sot errors. However, on the other hands as the technology scales, multiple bit upsets (MBUs) are becoming more likely to occur in the memories and the SEC codes have lost their effectiveness in fault coverage. Therefore a greater attention is devoted to the codes with the higher fault coverage such as single error correction/double error detection (SEC/DED) codes. These codes increase the delay, area and power consumption overhead. These parameters are the most important objective of error detection and correction codes (EDCs/ECCs) and are at odds with the capability of fault coverage, so there is a trade off between them. We intent to present a low energy method for detection and correction of errors in memory with the consideration of fault coverage capability. To this goal, we developed a single error correction/double adjacent error detection (SEC/DAED) code and a single error correction/double error detection/triple adjacent error detection (SEC/DED/TAED) code. the redundant bits of the proposed SEC/DAED and SEC/DED/TAED codes are the same as that used in SEC and SEC/DED codes, respectively, furthermore, their energy consumption and fault coverage are improved compared to these codes. The simulation results for the proposed SEC/DAED and SEC/DED/TAED codes reveal that CODEC energy consumption are reduced by 20% and 40% compared to the previously known codes in these categories, respectively. Memories of embedded systems in some applications need to have a high reliability. For this application we present a new matrix code based on the proposed SEC/DAED code. The proposed matrix code has a higher capability of fault coverage than the previously known matrix code and reduces the energy consumption by 20% compared to that code
  9. Keywords:
  10. Reliability ; Error Correction ; Binary Linear Block Code ; Residual Error Rate ; Single Error Correction and Double Error Detection (SEC-DED)Codes ; Energy Consumption

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