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System-level Energy Management for Hard Real-time Embedded Systems

Salehi Khanghahbar, Mohammad | 2016

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  1. Type of Document: Ph.D. Dissertation
  2. Language: Farsi
  3. Document No: 48255 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Ejlali, Alireza
  7. Abstract:
  8. Many embedded systems must be highly reliable and have hard real-time constraints. Technology scaling has enabled integration of multiple fast cores in a single chip. This provides higher computation speed that can achieve low response time in real-time systems. However, shrinking transistor dimensions aggravates reliability threats. Furthermore, hard real-time embedded systems are usually subjected to severe power and energy consumption limitations imposed by battery and cooling units. Therefore, designing hard real-time embedded systems requires careful considerations of reliability and power/energy consumption issues. High reliability can be achieved through exploiting fault tolerance techniques. However, these techniques may incur considerable energy overhead which necessitates the use of energy management techniques. Among the energy management techniques that can be used in different abstraction levels, system-level techniques are more preferable, since they do not modify hardware and also can be applied on larger parts of the system. Dynamic voltage scaling (DVS) and dynamic power management (DPM) are two main system-level energy management techniques. In this thesis, to efficiently use the capability of these energy management techniques some new concepts are presented and employed, which are: i) Pseudo-dynamic slack (slack time that is released at runtime but can be determined at design time), ii) Two-phase execution (normal phase while no fault has occurred and on-demand phase upon a fault occurrence) and iii) Dynamic redundancy and voltage scaling. By the use of these concepts we have proposed an N-modular redundancy (NMR) technique with low energy-overhead for multicore systems which employs two-phase task execution along with DVS and DPM for energy management. To reduce energy consumption in checkpointing we have proposed a technique which minimizes the number of checkpoints in fault-free states while guaranteeing applications deadline in faulty states. We have also proposed power-reliability management techniques for multicore systems under thermal design power (TPD) constraint and process variation. To do this, we exploit dynamic redundancy and voltage scaling considering variations in software and hardware levels
  9. Keywords:
  10. Reliability ; Hard Real Time Systems ; Embedded Real-Time System ; Energy Consumption Reduction ; System Level Energy Management ; Power Management in System Level

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