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- Type of Document: M.Sc. Thesis
- Language: Farsi
- Document No: 52854 (05)
- University: Sharif University of Technology
- Department: Electrical Engineering
- Advisor(s): Safarian, Amin Ghasem
- Abstract:
- A key point in designing class-C oscillators is maximizing the Figure-of-Merit (FoM). For this purpose, changing the oscillator’s structure or adjusting its bias current may be used. Previous literatures mostly limit their efforts to the first case, leaving the issue of determining the proper bias current almost untouched. In this work, a new approach recruiting DC voltage of the common source node of the switching pair transistors as an indicator has been presented. Using theoretical analysis, it has been shown that maximizing this voltage will optimize the oscillator in term of the FoM. The proposed indicator has the advantages of not introducing any loading effect to the output node, and independency from PVT changes. The idea is verified with circuit simulations on 0.18µm CMOS technology at 2GHz oscillation frequency. Moreover, a discrete prototype is fabricated at 15MHz and measurement results are provided which further validate feasibility of this approach. In order to practically implement this approach, and given that the above-mentioned voltage is a function of the bias current of the oscillator, a feedback loop is designed which automatically and continuously sets the oscillator in the optimum bias current. Therefore, and PVT change is checked in specific moments and then the feedback loop quickly amends the bias current to its new optimum value. The operation procedure of the feedback loop is confirmed through transient simulations on 0.18µm CMOS technology
- Keywords:
- Oscillators ; Phase Noise ; Saturation ; Optimization ; Feedback Loop ; Class C Oscillator ; Figure-of-Merit (FoM) ; Triode
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