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Circuit & Systematic Design of Low Power & High Speed SAR ADC

Khorami, Ata | 2014

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 46316 (05)
  4. University: Sharif University of Technology
  5. Department: Electrical Engineering
  6. Advisor(s): Sharifkhani, Mohammad
  7. Abstract:
  8. SAR ADC is a data converter which is based on binary search to convert an analog signal to a digital signal. Unlike other converters like pipeline, most of its constituent parts are digital, and hence scalable with process and consume less power, moreover can have better speed and power performance. With advanced technologies, namely 45nm and 32 nm CMOS, SAR ADCs are preferable as they consume much less power and area, therefore well-suited for portable applications, as opposed to Flash and Pipleline converters.
    The main drawback of this type of converter is its limited speed which is due to the fact that one clock cycle is required to evaluate each bit. As a result, there is a stringent trade-off between speed and resolution in SAR ADCs. In modern ADC design, with the aid of such techniques as “2bits/cycle”, “asynchronous ADC”, “Interleaving”, and “Redundancy” speed performance can be enhanced to an extent which is comparable with other types of converters. The core competency of SAR ADCs is its low power consumption.
    It can be shown that capacitive DAC consumes 60-80% of the total power consumption in SAR ADCs. In this work, two techniques are proposed to minimize the power consumption of DAC. In the first section of this thesis it is shown that adiabatic circuits can reduce power consumption of any capacitive DAC by a factor of less than one. Moreover, a new method is presented in which speed can be doubled with the same efficiency. This method obviates the need for discharging the capacitor to stabilize the adiabatic circuit, which is a key improvement in utilizing adiabatic circuits in SAR ADCs. As formulated in this thesis, if the proposed adiabatic circuit with the order of 4, 5, and 6
  9. Keywords:
  10. Digital to Analog Converter ; Successive Approximation Register (SAR) ; Low Power System ; Adiabatic Circuits ; High Speed Analog to Digital Converter

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