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Thermal and power aware task mapping on 3D Network on Chip

Mosayyebzadeh, A ; Sharif University of Technology

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  1. Type of Document: Article
  2. DOI: 10.1016/j.compeleceng.2015.12.001
  3. Publisher: Elsevier Ltd
  4. Abstract:
  5. High integration and increased elements density in 3D Network on Chip (NoC) will cause more energy consumption and high temperature on chip. By mapping those tasks that have data communication between them to near cores, the communication delay and therefore, power consumption will be reduced. In addition, mapping the tasks to cores that are near the heat sink, in such a way that the generated heat is distributed indiscriminately all over the chip, will decrease maximum chip temperature. In this paper, we propose a task mapping method based on fuzzy logic that aims to alleviate power and thermal problems in 3D-NoCs. In this method, the weight of task mapping factors can be changed according to chip's requirements and therefore, we present a flexible and simple solution. Simulation results show reduction in average communication delay and power consumption, as well as substantial reduction in maximum core temperature
  6. Keywords:
  7. 3D NoC ; Fuzzy logic ; NoC ; Task mapping ; Computer circuits ; Electric power utilization ; Energy utilization ; Fuzzy logic ; Mapping ; Power management ; Reconfigurable hardware ; Servers ; VLSI circuits ; 3D networks ; Chip temperature ; Communication delays ; Core temperature ; Data-communication ; High temperature ; Substantial reduction ; Task mapping ; Network-on-chip
  8. Source: Computers and Electrical Engineering ; Volume 51 , 2016 , Pages 157-167 ; 00457906 (ISSN)
  9. URL: http://www.sciencedirect.com/science/article/pii/S0045790615004280