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Communication at the Speed of Light (CaSoL): A New Paradigm for Designing Global Wires

Sarvari, R ; Sharif University of Technology | 2019

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  1. Type of Document: Article
  2. DOI: 10.1109/TED.2019.2919629
  3. Publisher: Institute of Electrical and Electronics Engineers Inc , 2019
  4. Abstract:
  5. In this paper, we argue that communication at the speed of light (CaSoL) through on-chip copper interconnects is possible in the near future based on giga-scale integration (GSI) technologies. A three-step algorithm is introduced to design the optimum buffers in such systems. HSPICE simulations show that a 1.3× time of flight (TF) is reachable in 7-nm FinFET technology. It is also shown that such a design is by nature, robust, and immune to process variations and crosstalk noise. © 1963-2012 IEEE
  6. Keywords:
  7. Buffer insertion ; Global on-chip interconnect ; Flight simulators ; Light velocity ; Copper interconnects ; Hspice simulations ; Integrated circuit interconnections ; On chip interconnect ; Process Variation ; Repeater Insertion ; Scale integration ; Integrated circuit interconnects
  8. Source: IEEE Transactions on Electron Devices ; Volume 66, Issue 8 , 2019 , Pages 3466-3472 ; 00189383 (ISSN)
  9. URL: https://ieeexplore.ieee.org/document/8736953