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Linear phase detection using two-phase latch

Tajalli, A ; Sharif University of Technology | 2003

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  1. Type of Document: Article
  2. DOI: 10.1049/el:20031142
  3. Publisher: 2003
  4. Abstract:
  5. Modified two-phase latch and flip-flop are introduced to implement a linear phase-detector (LPD) for 1/N-rate clock recovery applications. This technique greatly simplifies the required circuitry of the LPD and makes it suitable for higher speed applications while consuming less power compared to the conventional techniques
  6. Keywords:
  7. CMOS integrated circuits ; Variable frequency oscillators ; Logic circuits ; Integrated circuit layout ; Computer simulation
  8. Source: Electronics Letters ; Volume 39, Issue 24 , 2003 , Pages 1695-1696 ; 00135194 (ISSN)
  9. URL: https://digital-library.theiet.org/content/journals/10.1049/el_20031142