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Efficient hardware implementations of legendre symbol suitable for Mpc applications

Taheri, F ; Sharif University of Technology | 2022

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  1. Type of Document: Article
  2. DOI: 10.1109/TCSI.2021.3132770
  3. Publisher: Institute of Electrical and Electronics Engineers Inc , 2022
  4. Abstract:
  5. Multi-party computation (MPC) allows each peer to take part in the execution of a common function with their private share of data without the need to expose it to other participants. The Legendre symbol is a pseudo-random function (PRF) that is suitable for MPC protocols due to their efficient evaluation process compared to other symmetric primitives. Recently, Legendre-based PRFs have also been employed in the construction of a post-quantum signature scheme, namely LegRoast. In this paper, we propose, to the best of our knowledge, the first hardware implementations for the Legendre symbol by three approaches: 1) low-area, 2) high-speed, and 3) high-frequency. The high-speed architecture outperforms state-of-the-art software implementations, which run on Intel's Core-i5. Our evaluation results on FPGA show that this architecture reduces the Legendre calculation time by 2.56× compared to software implementations on Core-i5. On the other hand, the low-area architecture consumes only 5489 slices on the Artix-7 FPGA and is suitable for resource-constrained devices. Moreover, our ASIC implementation results indicate that the low-area architecture consumes 97.56K gates to implement and requires 4.01 mW to operate on 50 MHz. The high-frequency architecture increases the frequency by 1.72× over the high-speed architecture and achieves 200 MHz frequency on FPGA. © 2004-2012 IEEE
  6. Keywords:
  7. Digital signatures ; Legendre symbol ; MPC ; Post-quantum cryptography ; Application specific integrated circuits ; Authentication ; Computer hardware ; Cryptography ; Electronic document identification systems ; Field programmable gate arrays (FPGA) ; Function evaluation ; Integrated circuit design ; ASIC design ; FPGA and ASIC design ; FPGA design ; FPGAs and ASICs ; Hardware ; Legendre ; Low area ; Multiparty computation ; Post quantum cryptography ; Computer architecture
  8. Source: IEEE Transactions on Circuits and Systems I: Regular Papers ; Volume 69, Issue 3 , 2022 , Pages 1231-1239 ; 15498328 (ISSN)
  9. URL: https://ieeexplore.ieee.org/document/9653145