Sharif Digital Repository

The Boolean satisfiability problem plays a central role in computational complexity and is often used as a starting point for showing NP lower bounds. Generalisations such as Succinct SAT, where a Boolean formula is succinctly represented as a Boolean circuit, have been studied in the literature in order to lift the Boolean satisfiability problem to higher complexity classes such as NEXP. While, in theory, iterating this approach yields complete problems for k-NEXP for all k > 0, using such iterations of Succinct SAT is at best tedious when it comes to proving lower bounds. The main contribution of this paper is to show that the Boolean satisfiability problem has another canonical... 

From ancient times to 19th century geometry symbolized the essence of mathematical thinking and method, but modern philosophy of mathematics seems to have marginalized the philosophical status of geometry. The roots of this transformation will be sought in the ascendance of logical foundations in place of intuitive primacy as the cornerstone of mathematical certainty in the late 19th century. Nevertheless, geometry and geometrical thinking, in multiple manifestations, have continued to occupy a central place in the practice of mathematics proper. We argue that this, together with advances in the neuroscience of mathematical processes, calls for an expansion of the present limited remit of... 

Isogeny-based cryptography is one of the promising post-quantum candidates mainly because of its smaller public key length. Due to its high computational cost, efficient implementations are significantly important. In this paper, we have proposed a high-speed FPGA implementation of the supersingular isogeny Diffie-Hellman (SIDH) and key encapsulation (SIKE). To this end, we have adapted the algorithm of finding optimal large-degree isogeny computation strategy for hardware implementations. Using this algorithm, hardware-suited strategies (HSSs) can be devised. We have also developed a tool to schedule field arithmetic operations efficiently using constraint programming. This tool enables... 

We propose a lightweight scheme where the formation of a data block is changed in such a way that it can tolerate soft errors significantly better than the baseline. The key insight behind our work is that CNN weights are normalized between -1 and 1 after each convolutional layer, and this leaves one bit unused in half-precision floating-point representation. By taking advantage of the unused bit, we create a backup for the most significant bit to protect it against the soft errors. Also, considering the fact that in MLC STT-RAMs the cost of memory operations (read and write), and reliability of a cell are content-dependent (some patterns take larger current and longer time, while they are... 

As transistor dimensions continue to shrink, long-term reliability threats, such as Negative Bias Temperature Instability, affect multicore processors lifespan. This letter proposes a load balancing technique, based on the rate of integer and floating-point instructions per workloads. This technique classifies workloads into integer-majority and floating-point-majority classes and migrates workloads among cores in order to relax the stressed execution units. The context switching feature of operating system is employed to reduce implementation and performance overheads of the proposed technique. According to the simulations, the proposed technique reduces the aging rate of a multicore... 

Infrastructure as a Service (IaaS) is one of the most significant and fastest growing fields in cloud computing. To efficiently use the resources of an IaaS cloud, several important factors such as performance, availability, and power consumption need to be considered and evaluated carefully. Evaluation of these metrics is essential for cost-benefit prediction and quantification of different strategies which can be applied to cloud management. In this paper, analytical models based on Stochastic Reward Nets (SRNs) are proposed to model and evaluate an IaaS cloud system at different levels. To achieve this, an SRN is initially presented to model a group of physical machines which are... 

For the Heyting Arithmetic HA,HA is defined [14, 15] as the theory {A | HA-A}, where is called the box translation of A (Definition 2.4). We characterize the Σ1-provability logic of HA as a modal theory (Definition 3.17). © 2019 The Association for Symbolic Logic  

By Grothendieck’s anabelian conjectures, Galois representations landing in outer automorphism group of the algebraic fundamental group which are associated to hyperbolic smooth curves defined over number-fields encode all the arithmetic information of these curves. The Goal of this paper is to develop an arithmetic Teichmuller theory, by which we mean, introducing arithmetic objects summarizing the arithmetic information coming from all curves of the same topological type defined over number-fields. We also introduce Hecke-Teichmuller Lie algebra which plays the role of Hecke algebra in the anabelian framework. © 2019 Academic Center for Education, Culture and Research TMU  

We give a counterexample to the claim that every provably total function of Basic Arithmetic is a polynomially bounded primitive recursive function. © 2019 by University of Notre Dame  

By Grothendieck’s anabelian conjectures, Galois representations landing in outer automorphism group of the algebraic fundamental group which are associated to hyperbolic smooth curves defined over number-fields encode all the arithmetic information of these curves. The Goal of this paper is to develop an arithmetic Teichmuller theory, by which we mean, introducing arithmetic objects summarizing the arithmetic information coming from all curves of the same topological type defined over number-fields. We also introduce Hecke-Teichmuller Lie algebra which plays the role of Hecke algebra in the anabelian framework. © 2019 Academic Center for Education, Culture and Research TMU  

We give a counterexample to the claim that every provably total function of Basic Arithmetic is a polynomially bounded primitive recursive function. © 2019 by University of Notre Dame  

In this paper we introduce a modal theory iHσ which is sound and complete for arithmetical Σ1-interpretations in HA, in other words, we will show that iHσ is the Σ1-provability logic of HA. Moreover we will show that iHσ is decidable. As a by-product of these results, we show that HA+□⊥ has de Jongh property. © 2018 Elsevier B.V  

This research work presents a low-level radio frequency (RF) control method based on the in-phase, I , and quadrature, Q , components of the RF signal. The proposed method uses only the main four arithmetic operations, i.e., addition, subtraction, multiplication, and division, which makes this control method suitable for implementation on the field-programmable gate array. The control scheme is adaptive in the sense that it estimates the system response on-the-fly, and therefore, it is robust against changes in the loop phase and/or gain during the operation. © 2017 IEEE  

We study here the algorithmic analysis of systems modeled in terms of availability languages. Our first main result is a positive answer to the emptiness problem: it is decidable whether a given availability language contains a word. The key idea is an inductive construction that replaces availability languages with Parikh-equivalent regular languages. As a second contribution, we solve the intersection problem modulo bounded languages: given availability languages and a bounded language, it is decidable whether the intersection of the former contains a word from the bounded language. We show that the problem is NP-complete. The idea is to reduce to satisfiability of existential Presburger... 

Abstract BCD digit multiplication module (BDM) is widely used in BCD arithmetic, especially in Decimal Floating-Point (DFP) units. In this paper, we present a new BCD digit multiplication scheme to accelerate this module. Similar to previous articles, our multiplier includes two parts contained binary multiplier and binary to BCD converter. Our contribution towards these modules can successfully overcome the previous BCD digit multipliers. The results indicate 19% hardware acceleration for the proposed multiplier architecture which is comparable to the best previous techniques in UMC 65 nm CMOS standard cells library hardware implementation. Therefore, the proposed BCD digit multiplier is an... 

Cryptographic computation exploits finite field arithmetic and, in particular, multiplication. Lightweight and fast implementations of such arithmetic are necessary for many sensitive applications. This brief proposed a low-complexity systolic Montgomery multiplication over GF(2m). Our complexity analysis shows that the area complexity of the proposed architecture is reduced compared with the previous work. This has also been confirmed through our application-specific integrated circuit area and time equivalent estimations and implementations. Hence, the proposed architecture appears to be very well suited for high-throughput low-complexity cryptographic applications  

We show that the provability logic of. PA,. GL and the truth provability logic, i.e. the provability logic of. PA relative to the standard model N, GLS are reducible to their. Σ Σ1-provability logics,. GLV and. GLSV, respectively, by only propositional substitutions  

Let Δ be a simplicial complex and χ be an s-coloring of Δ. Biermann and Van Tuyl have introduced the simplicial complex Δχ. As a corollary of Theorems 5 and 7 in their 2013 article, we obtain that the Stanley–Reisner ring of Δχ over a field is Cohen–Macaulay. In this note, we generalize this corollary by proving that the Stanley–Reisner ideal of Δχ over a field is set-theoretic complete intersection. This also generalizes a result of Macchia  

RAPP (RFID Authentication Protocol with Permutation) is a recently proposed and efficient ultralightweight authentication protocol. Although it maintains the structure of the other existing ultralightweight protocols, the operation used in it is totally different due to the use of new introduced data dependent permutations and avoidance of modular arithmetic operations and biased logical operations such as AND and OR. The designers of RAPP claimed that this protocol resists against desynchronization attacks since the last messages of the protocol is sent by the reader and not by the tag. This letter challenges this assumption and shows that RAPP is vulnerable against desynchronization... 

The article proposes an approach to generate high-level test patterns from the arithmetic model of a register-transfer-level (RTL) circuit using a hybrid canonical data structure based on a decision diagram. High-level simplified and fast symbolic path activation strategy as well as input justification is combined with test pattern generation for circuits under consideration. For simplification of a test procedure, some ATPG approaches have been introduced based on binary decision diagram (BDD) tools. Since these methods require the design to be flattened into the bit level, they cannot be used to deal with large industrial benchmarks efficiently, either in terms of memory or runtime....