Loading...
Search for: arithmetization
0.01 seconds
Total 65 records

    Aging Mitigation for Arithmetic and Logic Unit of a Processor

    , M.Sc. Thesis Sharif University of Technology Sharifi, Ferdous (Author) ; Hesabi, Shahin (Supervisor)
    Abstract
    Shrinking the dimensions of transistors in recent fabrication technologies has led to an increase in the aging rate of chips, as the most important challenge in reliability of new processors. Bias Temperature Instability (BTI) and Hot Carrier Injection (HCI) are amongst the most important adverse effect of transistor shrinkage. These two effects decrease the switching speed of transistors by increasing its threshold voltage over time. Threshold voltage shift causes timing violation in combinational parts of circuit and decreases the robustness of sequential parts against soft errors. Between different units of a processor, Arithmetic and Logic Unit (ALU) is one of the most susceptible units... 

    Frameworks for the Exploration and Implementation of Generalized Carry-Free Redundant Number Systems

    , Ph.D. Dissertation Sharif University of Technology Jaberipur, Ghassem (Author) ; Ghodsi, Mohammad (Supervisor) ; Parhami, Behrooz (Supervisor)
    Abstract
    Redundant number systems provide for carry-free arithmetic, where the result of arithmetic operations is achieved, in redundant format, without the need for latent carry propagation. However conversion of the result to a conventional nonredundant representation, always, requires carry propagation. Therefore, efficient use of redundant number systems is feasible when a series of arithmetic operations is to be performed before the need arises to obtain the result in a nonredundant representation. Redundant number systems have been used in several special purpose integrated designs (e.g., DSP applications) and also as intermediate number representation in complex arithmetic operations... 

    Distributed Verifiable Computing: Algorithms and Analysis

    , M.Sc. Thesis Sharif University of Technology Rahimi, Ali (Author) ; Maddah Ali, Mohammad Ali (Supervisor)
    Abstract
    Zero knowledge proofs allow a person (prover) to convince another person (verifier) that he has performed a specific computation on a secret data correctly, and has obtained a true answer, without having to disclose the secret data. QAP (Quadratic Arithmetic Program) based zkSNARKs (zero knowledge Succinct Non-interactive Argument of Knowledge) are a type of zero knowledge proof. They have several properties that make them attractive in practice, e.g. verifier's work is very easy. So they are used in many areas such as Blockchain and cloud computing. But yet prover's work in QAP based zkSNARKs is heavy, therefore, it may not be possible for a prover with limited processing resource to run... 

    Designing a 32-Bit Fault-Tolerant ALU Using EDAC

    , M.Sc. Thesis Sharif University of Technology (Author) ; Vosughi Vahdat, Bijan (Supervisor) ; Mortazavi, Mohammad (Supervisor)
    Abstract

    Reliable communication has become very crucial in the transmission applications. Hence, to design hardware to handle reliability is the most important part of communication. In this work, we propose a new secured ALU (Arithmetic and Logic Unit) against fault attacks that is used in ARM processor which can correct any 5-bit error in any position of 32-bit input registers of ALU. We also designed a BCH (Bose, Chaudhuri, and Hocquenghem) codec (encoder, decoder) using the prototyping FPGA. Further, in this thesis we designed (63, 36) the BCH encoding and decoding system to tolerate the 5-bit faults. The codec system and ALU system are based on using Verilog description language. Since... 

    The ∑ 1-Provability Logic of Intuitionistic Arithmetic

    , Ph.D. Dissertation Sharif University of Technology Mojtahedi, Mojtaba (Author) ; Ardeshir, Mohammad (Supervisor)
    Abstract
    In this dissertation, we study (first-order) arithmetical interpretations for propositional (modal and non-modal) logics. More precisely, the following results are included in this dissertation: an axiomatization for provability logic of Heyting Arithmetic, HA, and its self-completion HA := HA + PrHA(⌜A⌝) ! A for 1-substitutions is provided, and their arithmetical completeness theorems are proved. We also show that they are decidable. The de Jongh property for Basic Arithmetic BA, HA and HA + □ are proved  

    Provability Logic

    , M.Sc. Thesis Sharif University of Technology Aboolian, Narbe (Author) ; Behrostaghi, Mohammad Ardeshir (Supervisor)
    Abstract
    Provability Logic is the study of Peano Arithmetic from the point of provability. The ◻ of modal logic is interpreted as ”Provable in PA ”. Gödel’s technique of proof, in his incompleteness theorems, showed that meta-lingual sentences such as ”A is provable in PA ” can be expressed by sentences of object language. Studying provability in the system K4 will lead us to a soundness theorem but in 1976, Robert Solovay showed that if we add an axiom -known as Löb’s axiom- to the system K4, we will have a completeness theorem as well. So GL = K4 + Löb is the provability logic of PA. In this thesis we will study these theorems  

    Existence of Arithmetic Progressions in Subsets of Natural Numbers

    , M.Sc. Thesis Sharif University of Technology Zareh Bidaki, Mojtaba (Author) ; Rastegar, Arash (Supervisor) ; Hatami Varzaneh, Omid (Supervisor)
    Abstract
    Szemeredi's theorem is one of the significant theorems in additive combinatorics which was started by Van Der Waerden's theorem in 1927. Erdos and Turan conjectured generalized versions of Van Der Waerden's theorem in several ways included Szemeredi's theorem. In 1975 Szemeredi proved the conjecture using complicated combinatorial methods. In 1977 H. Furstenberg proved Szemeredi's theorem via the Ergodic theory approach which led to prove polynomial Szemeredi's theorem and multi-dimensional Szemeredi's theorem. The Ergodic approach is the only known approach so far to these generalizations of this theorem which is named Ergodic Ramsey theory and led to some other problems in Ergodic theory... 

    Tolerance Analysis of Mechanical Assemblies Based on Fuzzy Logic and Modal Interval Arithmetic

    , Ph.D. Dissertation Sharif University of Technology Khodaygan, Saeed (Author) ; Movahhedy, Mohammad Reza (Supervisor) ; Saadat Foumani, Mahmoud (Supervisor)
    Abstract
    In mechanical products, individual components are placed together in an assembly to deliver a certain function. The performance, quality and cost of product, selection of manufacturing process, measurement and inspection techniques, and the assemblability of the product are significantly affected by part tolerances. The dimensional and geometrical tolerances of individual parts accumulate and affect the functional requirements on the final assembly. Tolerance analysis is a key analytical tool for estimation of accumulating effects of the individual part tolerances on the functional requirements of a mechanical assembly. This thesis presents a new feature based method to tolerance analysis... 

    Optimization and Verification of Arithmetic Circuits under Different Levels of Abstraction

    , M.Sc. Thesis Sharif University of Technology Sarbishei, Omid (Author) ; Tabandeh, Mahmoud (Supervisor) ; Alizadeh, Bijan (Supervisor)
    Abstract
    Arithmetic circuits are considered as very important blocks of datapaths in microprocessor structures. Due to the high importance of these circuits, several optimization approaches in different levels of abstraction have been proposed for them. These approaches can be implemented by either software or manually by digital logic designers. As within this optimization process, specially, in manual approaches, the probability of introducing logic bugs in the circuit is high, it would then be necessary to make use of verification and debugging techniques for the designed circuits. One of the classic verification methods is simulation. This approach is not suitable for large designs and it does... 

    On The Existence of Arithmetic Progressions In Subsets of Integers

    , M.Sc. Thesis Sharif University of Technology Malekian, Reihaneh (Author) ; Alishahi, Kasra (Supervisor) ; Hatami, Omid (Supervisor)
    Abstract
    Suppose that A is a large subset of N. It is interesting to think about the arithmetic progressions in A.In 1936, Erdos and Turan conjectured that for > 0 and k 2 N, there exists N = N(k; ) that for all subsets A {1; 2; : : : ;N}, if lAl N, A has a nontrivial arithmetic progression of length k. Roth proved the conjecture for k = 3 in 1953. In 1969, Szemeredi proved the case k = 4 and in 1975, he gave a combinatorial proof for the general case. In 1977, using ergodic theory, Furstenberg gave a different proof for the Erdos-Turan conjecture (or Szemeredi Theorem!) and finally Gowers found another proof for the Szemeredi theorem, which was an elegant generalization of the Roth’s proof for k =... 

    What's decidable about availability languages?

    , Article 35th IARCS Annual Conference on Foundations of Software Technology and Theoretical Computer Science, FSTTCS 2015, 16 December 2015 through 18 December 2015 ; Volume 45 , 2015 , Pages 192-205 ; 18688969 (ISSN) ; 9783939897972 (ISBN) Abdulla, P. A ; Atig, M. F ; Meyer, R ; Salehi, M. S ; Harsha P ; Ramalingam G ; Sharif University of Technology
    Schloss Dagstuhl- Leibniz-Zentrum fur Informatik GmbH, Dagstuhl Publishing  2015
    Abstract
    We study here the algorithmic analysis of systems modeled in terms of availability languages. Our first main result is a positive answer to the emptiness problem: it is decidable whether a given availability language contains a word. The key idea is an inductive construction that replaces availability languages with Parikh-equivalent regular languages. As a second contribution, we solve the intersection problem modulo bounded languages: given availability languages and a bounded language, it is decidable whether the intersection of the former contains a word from the bounded language. We show that the problem is NP-complete. The idea is to reduce to satisfiability of existential Presburger... 

    Weighted two-valued digit-set encodings: Unifying efficient hardware representation schemes for redundant number systems

    , Article IEEE Transactions on Circuits and Systems I: Regular Papers ; Volume 52, Issue 7 , 2005 , Pages 1348-1357 ; 10577122 (ISSN) Jaberipur, G ; Parhami, B ; Ghodsi, M ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2005
    Abstract
    We introduce the notion of two-valued digit (twit) as a binary variable that can assume one of two different integer values. Posibits, or simply bits, in {0, 1} and negabits in {-1, 0}, commonly used in two's-complement representations and (n, p) encoding of binary signed digits, are special cases of twits. A weighted bit-set (WBS) encoding, which generalizes the two's-complement encoding by allowing one or more posibits and/or negabits in each radix-2 position, has been shown to unify many efficient implementations of redundant number systems. A collection of equally weighted twits, including ones with non-contiguous values (e.g., {-1, 1} or {0, 2}), can lead to wider representation range... 

    Universal image steganalysis against spatial-domain steganography based on energy distribution of singular values

    , Article 7th International Conference on Information Technology and Application, ICITA 2011 ; 2011 , Pages 179-183 ; 9780980326741 (ISBN) Shojaei Hashemi, A ; Soltanian Zadeh, H ; Ghaemmagham, S ; Kamarei, M ; Sharif University of Technology
    Abstract
    A passive image steganalysis method is proposed to universally detect spatial-domain steganography schemes. It is shown to have better performance than universal steganalyzers known to be powerful in spatial domain, including the WFLogSv and the WAM methods. This level of accuracy is the result of improving the WFLogSv steganalyzer by considering a more comprehensive relationship between the singular values of each image block and the linear correlation of the rows and the columns. That is, instead of the closeness of the lower singular values to zero, the energy distribution of the singular values is investigated. An innovative measure is proposed for this investigation, which is inspired... 

    Tolerance analysis of mechanical assemblies based on modal interval and small degrees of freedom (MI-SDOF) concepts

    , Article International Journal of Advanced Manufacturing Technology ; Volume 50, Issue 9-12 , 2010 , Pages 1041-1061 ; 02683768 (ISSN) Khodaygan, S ; Movahhedy, M. R ; Saadat Fomani, M ; Sharif University of Technology
    Abstract
    Tolerance analysis is a key analytical tool for estimation of accumulating effects of the individual part tolerances on the design specifications of a mechanical assembly. This paper presents a new feature-based approach to tolerance analysis for mechanical assemblies with geometrical and dimensional tolerances. In this approach, geometrical and dimensional tolerances are expressed by small degrees of freedom (SDOF) of geometric entities (faces, feature axes, edges, and features of size) that are described by tolerance zones. The uncertainty of dimensions and geometrical form of features due to tolerances is mathematically described using modal interval arithmetic. The two concepts of modal... 

    The Σ1-Provability Logic of HA

    , Article Journal of Symbolic Logic ; Volume 84, Issue 3 , 2019 , Pages 1118-1135 ; 00224812 (ISSN) Ardeshir, M ; Mojtahedi, M ; Sharif University of Technology
    Cambridge University Press  2019
    Abstract
    For the Heyting Arithmetic HA,HA is defined [14, 15] as the theory {A | HA-A}, where is called the box translation of A (Definition 2.4). We characterize the Σ1-provability logic of HA as a modal theory (Definition 3.17). © 2019 The Association for Symbolic Logic  

    The Σ1-provability logic of HA

    , Article Annals of Pure and Applied Logic ; Volume 169, Issue 10 , 2018 , Pages 997-1043 ; 01680072 (ISSN) Ardeshir, M ; Mojtahedi, M ; Sharif University of Technology
    Elsevier B.V  2018
    Abstract
    In this paper we introduce a modal theory iHσ which is sound and complete for arithmetical Σ1-interpretations in HA, in other words, we will show that iHσ is the Σ1-provability logic of HA. Moreover we will show that iHσ is decidable. As a by-product of these results, we show that HA+□⊥ has de Jongh property. © 2018 Elsevier B.V  

    The de jongh property for basic arithmetic

    , Article Archive for Mathematical Logic ; 2014 ; ISSN: 09335846 Ardeshir, M ; Mojtahedi, S. M ; Sharif University of Technology
    Abstract
    We prove that Basic Arithmetic, BA, has the de Jongh property, i.e., for any propositional formula A(p1,..., pn) built up of atoms p1,..., pn, BPC(Formula presented.)A(p1,..., pn) if and only if for all arithmetical sentences B1,..., Bn, BA(Formula presented.)A(B1,..., Bn). The technique used in our proof can easily be applied to some known extensions of BA  

    The curious neglect of geometry in modern philosophies of mathematics

    , Article Logic, Epistemology, and the Unity of Science ; Volume 49 , 2021 , Pages 379-389 ; 22149775 (ISSN) Shahshahani, S ; Sharif University of Technology
    Springer Science and Business Media B.V  2021
    Abstract
    From ancient times to 19th century geometry symbolized the essence of mathematical thinking and method, but modern philosophy of mathematics seems to have marginalized the philosophical status of geometry. The roots of this transformation will be sought in the ascendance of logical foundations in place of intuitive primacy as the cornerstone of mathematical certainty in the late 19th century. Nevertheless, geometry and geometrical thinking, in multiple manifestations, have continued to occupy a central place in the practice of mathematics proper. We argue that this, together with advances in the neuroscience of mathematical processes, calls for an expansion of the present limited remit of... 

    Simulation and improvement of two digital adaptive frequency calibration techniques for fast locking wide-band frequency synthesizers

    , Article 2007 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2007, Rabat, 2 September 2007 through 5 September 2007 ; February , 2007 , Pages 136-141 ; 1424412781 (ISBN); 9781424412785 (ISBN) Saadat, M. R ; Momtazpour, M ; Alizadeh, B ; Sharif University of Technology
    2007
    Abstract
    Fast locking PLL-based wide-band frequency synthesizers used in high performance RF transceivers often require multi-band voltage controlled oscillator (VCO). These types of frequency synthesizers employ both discrete and continuous tuning mechanisms to satisfy wide frequency range and low VCO tuning gain simultaneously. To facilitate discrete tuning mechanisms, an auxiliary digital loop is required in order to select proper band of VCO. This digital loop is called adaptive frequency calibration (AFC). In this paper two methods of previous AFC architectures are discussed and improved to gain the minimum possible lock time of PLL. Then, these two methods are simulated and implemented over... 

    Reliable and energy efficient MLC STT-RAM buffer for CNN accelerators

    , Article Computers and Electrical Engineering ; Volume 86 , 2020 Jasemi, M ; Hessabi, S ; Bagherzadeh, N ; Sharif University of Technology
    Elsevier Ltd  2020
    Abstract
    We propose a lightweight scheme where the formation of a data block is changed in such a way that it can tolerate soft errors significantly better than the baseline. The key insight behind our work is that CNN weights are normalized between -1 and 1 after each convolutional layer, and this leaves one bit unused in half-precision floating-point representation. By taking advantage of the unused bit, we create a backup for the most significant bit to protect it against the soft errors. Also, considering the fact that in MLC STT-RAMs the cost of memory operations (read and write), and reliability of a cell are content-dependent (some patterns take larger current and longer time, while they are...