Improving the Performance and Power Consumption of on-Chip Network Using Hybrid Switching

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Teimouri, Nasibeh | 2010

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Type of Document: M.Sc. Thesis
Language: Farsi
Document No: 41091 (19)
University: Sharif University of Technology
Department: Computer Engineering
Advisor(s): Sarbazi Azad, Hamid
Abstract:
Switching as one of important characteristics of on-chip network affects on power consumption and performance. In general there are two switching methods as circuit-switching and packet-switching. Hybrid switching includes both switching to have both resource utilization and scalability of packet switching and low power consumption and improved latency of circuit switching. Also topology is another network attribute that greatly affects the power, performance, cost, and design time/effort of NoCs. In this thesis, we propose a novel NoC architecture which holds both fixed connections between adjacent nodes and long connections virtually connecting non-adjacent nodes. Our proposed NoC architecture uses hybrid switching that uses long connections as circuit or sub-circuit for sending more traffic to destinations
Keywords:
Routing ; Delay ; Efficiency ; Power Consumption ; Network-on-Chip (NOC) ; Packet Switching ; Circuit Switching

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