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Providing Efficient SPM Mapping Algorithms for Fault-Tolerant Embedded Processors

Hosseini Monazzah, Amir Mahdi | 2012

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 43747 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Miremadi, Ghassem
  7. Abstract:
  8. Deterministic and Predictable behaviors are two important constraints in real-time embedded systems. Using cache memories alongside of CPUs may lead to nondeterministic and unpredictable behaviors in embedded systems. To avoid these behaviors, embedded system designers use Scratchpad Memories (SPMs). In addition, using embedded systems in safty-critical applications need to include reliability and fault tolerance. The first challenge to using SPM is the management of its contents,called SPM Mapping. SPM Mappingconsists of three important parts:1) Determining the most frequent parts of programs, 2) Efficient assignment of SPM area to those parts, and 3) Controlling the transitions of those parts between main memory and SPM. Many SPM mapping algorithms for different applications and constraints have been proposed without attempting to improve the reliability factor. This work proposes an efficient SPM mapping algorithm, which improves the SPM reliability. To implement the proposedalgorithm, a hybrid structure across SPM area was utilized, which consists of non-volatile memories and SRAM cells. In this way, the SPM benefits from: 1) The unexpected reliability of non-volatile memories against radiation induced soft errors, and 2) Suitable performance and endurance of SRAM cells, simultaneously. Experimental results for SPM show: 1) The reliability is enhanced by %34, 2) Theenergy consumption is reduced by %55, 3) The endurance is improved by 150 times of order, and4) The performance overhead was very low
  9. Keywords:
  10. Reliability ; Scratch Pad Memory (SPM) ; Scratch Pad Mapping ; Nonvolatile Memory

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