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Analysis of integral non-linearity errors in two-step analogue-to-digital converters

Nikandish, G ; Sharif University of Technology

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  1. Type of Document: Article
  2. DOI: 10.1049/iet-cds.2011.0123
  3. Abstract:
  4. A new method for modelling and analysis of non-linearity errors caused by the capacitor mismatches and op-amp non-idealities in two-step analogue-to-digital converters (ADCs) is presented. Analytical formulas for estimation of the ADC integral non-linearity (INL) are derived. Using the proposed method, the ADC INL can be calculated in terms of the capacitor mismatches standard deviations. Therefore time-consuming Monte Carlo simulations which are conventionally used to evaluate the effect of random capacitor mismatches on the ADC linearity can be avoided. The effect of op-amp non-idealities, which are frequently examined by the circuit-level simulations, can also be evaluated using the derived model for the INL in terms of the op-amp DC gain and non-linearity. Accuracy of the proposed model is validated by the system and circuit-level Monte Carlo simulations. By using the proposed model, static performance of the conventional restoring (CR) and redundant signed digit (RSD) converters in the presence of mentioned errors are compared
  5. Keywords:
  6. Analytical formulas ; Capacitor mismatch ; Circuit-level simulation ; DC gain ; Integral nonlinearity ; Monte Carlo Simulation ; Non-idealities ; Non-Linearity ; Non-linearity errors ; Signed digits ; Standard deviation ; Static performance ; Capacitors ; Computer simulation ; Monte Carlo methods ; Errors
  7. Source: IET Circuits, Devices and Systems ; Volume 6, Issue 1 , January , 2012 , Pages 1-8 ; 1751858X (ISSN)
  8. URL: http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6153159&url=http%3A%2F%2Fieeexplore.ieee.org%2Fiel5%2F4123966%2F6153158%2F06153159.pdf%3Farnumber%3D6153159