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Captopril: Reducing the pressure of bit flips on hot locations in non-volatile main memories

Jalili, M ; Sharif University of Technology | 2016

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  1. Type of Document: Article
  2. Publisher: Institute of Electrical and Electronics Engineers Inc , 2016
  3. Abstract:
  4. High static power consumption and insufficient scalability of the commonly used DRAM main memory technology appear to be tough challenges in upcoming years. Hence, adopting new technologies, i.e. non-volatile memories (NVMs), is a proper choice. NVMs tolerate a low number of write operations while having good scalability and low static power consumption. Due to the non-destructive nature of a read operation and the long latency of a write operation in NVMs, designers use read-before-write (RBW) mechanism to mask the unchanged bits during write operation in order to reduce bit flips. Based on this observation that some specific locations of blocks are responsible for the majority of bit flips, we extend the RBW to further reduce the number of bit flips per write in the memory system. The results taken from full-system simulations reveal that our proposal, called Captopril, can reduce the number of bit flips by 21% and 9%, on average, compared to the baseline and state-of-the-art designs, respectively
  5. Keywords:
  6. Data storage equipment ; Design ; Electric power utilization ; Scalability ; Full-system simulation ; Low static power ; Non-volatile main memory ; Non-volatile memory ; Specific location ; State of the art ; Static power consumption ; Write operations ; Dynamic random access storage
  7. Source: Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016, 14 March 2016 through 18 March 2016 ; 2016 , Pages 1116-1119 ; 9783981537062 (ISBN)
  8. URL: http://ieeexplore.ieee.org/document/7459475