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Single event multiple upset-tolerant SRAM cell designs for nano-scale CMOS technology

Rajaei, R ; Sharif University of Technology | 2017

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  1. Type of Document: Article
  2. DOI: 10.3906/elk-1502-124
  3. Publisher: Turkiye Klinikleri Journal of Medical Sciences , 2017
  4. Abstract:
  5. In this article, two soft error tolerant SRAM cells, the so-called RATF1 and RATF2, are proposed and evaluated. The proposed radiation hardened SRAM cells are capable of fully tolerating single event upsets (SEUs). Moreover, they show a high degree of robustness against single event multiple upsets (SEMUs). Over the previous SRAM cells, RATF1 and RATF2 offer lower area and power overhead. The Hspice simulation results through comparison with some prominent and state-of-the-art soft error tolerant SRAM cells show that our proposed robust SRAM cells have smaller area overhead (RAFT1 offers 58% smaller area than DICE), lower power delay product (RATF1 offers 231.33% and RATF2 offers 74.75% lower PDP compared with DICE), much more soft error robustness, and larger noise margins. © TÜBİTAK
  6. Keywords:
  7. Single event multiple upset (SEMU) ; Single event upset (SEU) ; SRAM cell ; Cells ; CMOS integrated circuits ; Cytology ; Digital storage ; Errors ; Flash memory ; Nanotechnology ; Radiation hardening ; SPICE ; Degree of robustness ; Hspice simulations ; Power delay product ; Radiation-hardened ; Single event upsets ; Single-event multiple-upset ; Soft error ; Static random access storage
  8. Source: Turkish Journal of Electrical Engineering and Computer Sciences ; Volume 25, Issue 2 , 2017 , Pages 1035-1047 ; 13000632 (ISSN)
  9. URL: http://journals.tubitak.gov.tr/elektrik/issues/elk-17-25-2/elk-25-2-29-1502-124.pdf