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An N-Path filter design methodology with harmonic rejection, power reduction, foldback elimination, and spectrum shaping

Karami, P ; Sharif University of Technology | 2020

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  1. Type of Document: Article
  2. DOI: 10.1109/TCSI.2020.3009191
  3. Publisher: Institute of Electrical and Electronics Engineers Inc , 2020
  4. Abstract:
  5. In this paper, an adaptive design methodology for synthesizing a harmonic free N-path filter with reduced frequency folding is presented. System level analysis of proposed architecture shows that by adding a few extra paths with proper weights to a conventional N-path filter, several characteristics such as harmonic rejection, power reduction, foldback elimination and spectrum shaping can be achieved. The designed filter is reconfigurable to be a band-pass filter (BPF) or a band-reject filter (notch), based on the requirements. By using the nth harmonic of Local Oscillator (LO) signal, instead of the fundamental harmonic, the required input clock frequency in N-phase clock generator is reduced by a factor of n. As a proof of concept, a 0.1-5 GHz RF filter with 75 dB and 82 dB harmonic rejection at 3rd and 5th order harmonics respectively is analyzed and simulated using MATLAB and Cadence Spectre-RF. Post-layout simulations are performed using CMOS 180 nm technology with 1.8 V supply voltage. The total power consumption of the chip is less than 8.5 mW while occupying a silicon area of 0.2 mm2. Furthermore, Noise Figure (NF) of the circuit is shown to be between 3.5 and 4.7 dB and its out-of-band IIP3 is +6 dBm. © 2004-2012 IEEE
  6. Keywords:
  7. Band-pass filter ; CMOS ; Cognitive radio ; Frequency folding ; Harmonic free ; High-Q ; N-path filter ; Power consumption ; Software defined radio (SDR) ; Tunable filter ; Clocks ; Computer architecture ; Design ; Harmonic analysis ; MATLAB ; Noise figure ; Notch filters ; Band-reject filters ; Fundamental harmonic ; Harmonic rejection ; Post layout simulation ; Proposed architectures ; Reduced frequency ; System-level analysis ; Total power consumption ; Bandpass filters
  8. Source: IEEE Transactions on Circuits and Systems I: Regular Papers ; Volume 67, Issue 12 , 2020 , Pages 4494-4506
  9. URL: https://ieeexplore.ieee.org/document/9149785